Fix 64-bit addition in prologue.

2019-05-24  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn.c (gcn_expand_prologue): Use gen_addsi3_scalar_carry
	for lo-part.

From-SVN: r271600

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index daaa8c8f7c5dc35bee137692176937dffc70c65b..9c7cd73cd8bd2f1f997416dc64a4a6c12202deaa 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-05-24  Andrew Stubbs  <ams@codesourcery.com>
+
+       * config/gcn/gcn.c (gcn_expand_prologue): Use gen_addsi3_scalar_carry
+       for lo-part.
+
 2019-05-24  Matthew Malcomson  <matthew.malcomson@arm.com>
 
        PR target/90588

diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c
index 47630c6edb400980ade6406553ffc48b9cd50751..71f4b4ce35a708011ef1613a80769219801133b4 100644 (file)
--- a/gcc/config/gcn/gcn.c
+++ b/gcc/config/gcn/gcn.c
@@ -2824,9 +2824,9 @@ gcn_expand_prologue ()
       emit_move_insn (fp_lo, gen_rtx_REG (SImode, 0));
       emit_insn (gen_andsi3_scc (fp_hi, gen_rtx_REG (SImode, 1),
                                 gen_int_mode (0xffff, SImode)));
-      emit_insn (gen_addsi3_scc (fp_lo, fp_lo, wave_offset));
-      emit_insn (gen_addcsi3_scalar_zero (fp_hi, fp_hi,
-                                         gen_rtx_REG (BImode, SCC_REG)));
+      rtx scc = gen_rtx_REG (BImode, SCC_REG);
+      emit_insn (gen_addsi3_scalar_carry (fp_lo, fp_lo, wave_offset, scc));
+      emit_insn (gen_addcsi3_scalar_zero (fp_hi, fp_hi, scc));
 
       if (sp_adjust > 0)
        emit_insn (gen_adddi3_scc (sp, fp, gen_int_mode (sp_adjust, DImode)));