Revert "Compile option for enabling async load verific support"
authorMiodrag Milanovic <mmicko@gmail.com>
Wed, 27 Oct 2021 13:55:43 +0000 (15:55 +0200)
committerMiodrag Milanovic <mmicko@gmail.com>
Wed, 27 Oct 2021 13:55:43 +0000 (15:55 +0200)
This reverts commit b8624ad2aef941776f5b4a08f66f8d43e70f8467.

Makefile
frontends/verific/verific.cc

index c919c9563bd7cd1ad01625ad965b7b485d81c9e4..f72106750dbc5635eb841023c514bafaa7510e93 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -20,7 +20,6 @@ ENABLE_GHDL := 0
 ENABLE_VERIFIC := 0
 DISABLE_VERIFIC_EXTENSIONS := 0
 DISABLE_VERIFIC_VHDL := 0
-ENABLE_VERIFIC_ASYNC_LOAD := 0
 ENABLE_COVER := 1
 ENABLE_LIBYOSYS := 0
 ENABLE_PROTOBUF := 0
@@ -502,9 +501,6 @@ endif
 ifeq ($(ENABLE_VERIFIC),1)
 VERIFIC_DIR ?= /usr/local/src/verific_lib
 VERIFIC_COMPONENTS ?= verilog database util containers hier_tree
-ifeq ($(ENABLE_VERIFIC_ASYNC_LOAD),1)
-CXXFLAGS += -DVERIFIC_ASYNC_LOAD
-endif
 ifneq ($(DISABLE_VERIFIC_VHDL),1)
 VERIFIC_COMPONENTS += vhdl
 CXXFLAGS += -DVERIFIC_VHDL_SUPPORT
index 47ddbc66205d7ffec565230905a5f475fd514241..18fba9b76acf716a148ff952afeeee27b23c96c9 100644 (file)
@@ -2474,11 +2474,8 @@ struct VerificPass : public Pass {
                        RuntimeFlags::SetVar("db_preserve_user_nets", 1);
                        RuntimeFlags::SetVar("db_allow_external_nets", 1);
                        RuntimeFlags::SetVar("db_infer_wide_operators", 1);
-#ifdef VERIFIC_ASYNC_LOAD
-                       RuntimeFlags::SetVar("db_infer_set_reset_registers", 0);
-#else
                        RuntimeFlags::SetVar("db_infer_set_reset_registers", 1);
-#endif
+
                        RuntimeFlags::SetVar("veri_extract_dualport_rams", 0);
                        RuntimeFlags::SetVar("veri_extract_multiport_rams", 1);