si_update_fb_rs_state(sctx);
sctx->clip_regs.dirty = true;
+ sctx->last_rast_prim = -1; /* reset this so that it gets updated */
}
static void si_delete_rs_state(struct pipe_context *ctx, void *state)
if (sctx->gs_shader)
mode = sctx->gs_shader->gs_output_prim;
+ if (mode == sctx->last_rast_prim)
+ return;
+
r600_write_context_reg(cs, R_028A0C_PA_SC_LINE_STIPPLE,
sctx->pa_sc_line_stipple |
S_028A0C_AUTO_RESET_CNTL(mode == PIPE_PRIM_LINES ? 1 :
S_028814_PROVOKING_VTX_LAST(mode == PIPE_PRIM_QUADS ||
mode == PIPE_PRIM_QUAD_STRIP ||
mode == PIPE_PRIM_POLYGON));
+
+ sctx->last_rast_prim = mode;
}
static void si_emit_draw_registers(struct si_context *sctx,