+2016-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR middle-end/37780
+ * config/arm/arm.md (ctzsi2): Convert to define_insn_and_split.
+
2016-06-06 Bernd Edlinger <bernd.edlinger@hotmail.de>
PR c/24414
(set_attr "predicable_short_it" "no")
(set_attr "type" "clz")])
-(define_expand "ctzsi2"
- [(set (match_operand:SI 0 "s_register_operand" "")
- (ctz:SI (match_operand:SI 1 "s_register_operand" "")))]
+;; Keep this as a CTZ expression until after reload and then split
+;; into RBIT + CLZ. Since RBIT is represented as an UNSPEC it is unlikely
+;; to fold with any other expression.
+
+(define_insn_and_split "ctzsi2"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (ctz:SI (match_operand:SI 1 "s_register_operand" "r")))]
"TARGET_32BIT && arm_arch_thumb2"
+ "#"
+ "&& reload_completed"
+ [(const_int 0)]
"
- {
- rtx tmp = gen_reg_rtx (SImode);
- emit_insn (gen_rbitsi2 (tmp, operands[1]));
- emit_insn (gen_clzsi2 (operands[0], tmp));
- }
- DONE;
- "
-)
+ emit_insn (gen_rbitsi2 (operands[0], operands[1]));
+ emit_insn (gen_clzsi2 (operands[0], operands[0]));
+ DONE;
+")
;; V5E instructions.