AArch64/opcodes: Correct another `index' global shadowing error

Fix a commit c2c4ff8d52a2 ("[AArch64] Add ARMv8.3 FCMLA and FCADD
instructions") build regression:

cc1: warnings being treated as errors
.../opcodes/aarch64-dis.c: In function 'aarch64_ext_sve_addr_rr_lsl':
.../opcodes/aarch64-dis.c:1324: error: declaration of 'index' shadows a global declaration
/usr/include/string.h:303: error: shadowed declaration is here
make[4]: *** [aarch64-asm.lo] Error 1

in a way following commit 91d6fa6a035c ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").

	opcodes/
	* aarch64-asm.c (aarch64_ins_reglane): Rename `index' local
	variable to `reglane_index'.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 09f03419e2a9c914ca922c397b9f95ff721f5849..110739a2c8a6ede6a1d87dfd262e726c00300ce0 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2016-12-08  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * aarch64-asm.c (aarch64_ins_reglane): Rename `index' local
+       variable to `reglane_index'.
+
 2016-12-08  Luis Machado  <lgustavo@codesourcery.com>
 
        * ppc-dis.c (get_powerpc_dialect): Check NULL info->section.

diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index cfe663087c433cb8cf9423428ca14e049f67c36c..6d7072c5bbc25dfe9446a7e055cd685bff4894ed 100644 (file)
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -125,28 +125,28 @@ aarch64_ins_reglane (const aarch64_operand *self, const aarch64_opnd_info *info,
     {
       /* index for e.g. SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]
          or SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>].  */
-      unsigned index = info->reglane.index;
+      unsigned reglane_index = info->reglane.index;
 
       if (inst->opcode->op == OP_FCMLA_ELEM)
        /* Complex operand takes two elements.  */
-       index *= 2;
+       reglane_index *= 2;
 
       switch (info->qualifier)
        {
        case AARCH64_OPND_QLF_S_H:
          /* H:L:M */
-         assert (index < 8);
-         insert_fields (code, index, 0, 3, FLD_M, FLD_L, FLD_H);
+         assert (reglane_index < 8);
+         insert_fields (code, reglane_index, 0, 3, FLD_M, FLD_L, FLD_H);
          break;
        case AARCH64_OPND_QLF_S_S:
          /* H:L */
-         assert (index < 4);
-         insert_fields (code, index, 0, 2, FLD_L, FLD_H);
+         assert (reglane_index < 4);
+         insert_fields (code, reglane_index, 0, 2, FLD_L, FLD_H);
          break;
        case AARCH64_OPND_QLF_S_D:
          /* H */
-         assert (index < 2);
-         insert_field (FLD_H, code, index, 0);
+         assert (reglane_index < 2);
+         insert_field (FLD_H, code, reglane_index, 0);
          break;
        default:
          assert (0);