testsuite: Adjust expected results for rlwimi-2.c and vec-rlmi-rlnm.c

	Enable rlwimi-2.c and vec-rlmi-rlmn.c testcases for additional
target configurtions and update the expected results.

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/rlwimi-2.c: Adjust expected results for lp64.
	* gcc.target/powerpc/vec-rlmi-rlnm.c: Remove target and LP64.
	Adjust xxlor expected results.

diff --git a/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c b/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c
index 62344a95aa01ea3f3a0fde011c021557af2d3a5a..bafa371db73f5d5823c3a084a1057b89ea801c8c 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/rlwimi-2.c
@@ -6,9 +6,10 @@
 /* { dg-final { scan-assembler-times {(?n)^\s+blr} 6750 } } */
 /* { dg-final { scan-assembler-times {(?n)^\s+mr} 643 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {(?n)^\s+mr} 11 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {(?n)^\s+rldicl} 6728 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {(?n)^\s+rldicl} 7790 { target lp64 } } } */
 
-/* { dg-final { scan-assembler-times {(?n)^\s+rlwimi} 1692 } } */
+/* { dg-final { scan-assembler-times {(?n)^\s+rlwimi} 1692 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {(?n)^\s+rlwimi} 1666 { target lp64 } } } */
 
 /* { dg-final { scan-assembler-times {(?n)^\s+mulli} 5036 } } */
 

diff --git a/gcc/testsuite/gcc.target/powerpc/vec-rlmi-rlnm.c b/gcc/testsuite/gcc.target/powerpc/vec-rlmi-rlnm.c
index f0d9a71d9b88fadc9b829bc1afd60b55bbed412d..36e6eb137fb4c187e2b60356f1d585b8fe08902d 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/vec-rlmi-rlnm.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-rlmi-rlnm.c
@@ -1,5 +1,4 @@
-/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
+/* { dg-do compile }
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-options "-O2 -mdejagnu-cpu=power9" } */
 
@@ -63,6 +62,7 @@ rlnm_test_2 (vector unsigned long long x, vector unsigned long long y,
 /* { dg-final { scan-assembler-times "vextsb2d" 1 } } */
 /* { dg-final { scan-assembler-times "vslw" 1 } } */
 /* { dg-final { scan-assembler-times "vsld" 1 } } */
-/* { dg-final { scan-assembler-times "xxlor" 2 } } */
+/* { dg-final { scan-assembler-times "xxlor" 2 { target le } } } */
+/* { dg-final { scan-assembler-times "xxlor" 3 { target be } } } */
 /* { dg-final { scan-assembler-times "vrlwnm" 2 } } */
 /* { dg-final { scan-assembler-times "vrldnm" 2 } } */