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nir/spirv: fix wrong writemask for ALU operations
author
Connor Abbott
<connor.w.abbott@intel.com>
Thu, 9 Jul 2015 18:28:39 +0000
(14:28 -0400)
committer
Connor Abbott
<connor.w.abbott@intel.com>
Thu, 9 Jul 2015 18:28:39 +0000
(14:28 -0400)
src/glsl/nir/spirv_to_nir.c
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diff --git
a/src/glsl/nir/spirv_to_nir.c
b/src/glsl/nir/spirv_to_nir.c
index 5401908b15b8a6fb4bf73a2ef133f0009edc2deb..6819f88833a219d744a4e7862965d4361c5cb3a0 100644
(file)
--- a/
src/glsl/nir/spirv_to_nir.c
+++ b/
src/glsl/nir/spirv_to_nir.c
@@
-1840,6
+1840,7
@@
vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
nir_alu_instr *instr = nir_alu_instr_create(b->shader, op);
nir_ssa_dest_init(&instr->instr, &instr->dest.dest,
glsl_get_vector_elements(type), val->name);
+ instr->dest.write_mask = (1 << glsl_get_vector_elements(type)) - 1;
val->ssa->def = &instr->dest.dest.ssa;
for (unsigned i = 0; i < nir_op_infos[op].num_inputs; i++)