+2000-10-31 Bernd Schmidt <bernds@redhat.co.uk>
+
+ * config/i386/i386.c (ix86_init_builtins): Correct return type
+ building v4hi_ftype_v4hi_int_int tree node.
+ (ix86_expand_builtin): Use correct operand numbers 0 and 1.
+ Copy operand 0 into a Pmode register, don't generate a MEM rtx.
+
+ * config/i386/i386.md (sse_movntdi): Use mmx register constraint
+ for operand 1.
+ (mmx__uavgv8qi3): Correct insn mnemonic.
+ (mmx_psadbw): Correct insn mnemonic. Use V8QI mode for operands 1 and 2.
+ (mmx_punpckhwd): Correct insn mnemonic.
+ (mmx_punpckhdq): Likewise.
+ (mmx_punpcklwd): Likewise.
+ (mmx_punpckldq): Likewise.
+ (prefetch): Use immediare_operand and 'n' constraint for operand 1.
+ Renumber case labels to match the _mm_prefetch constants defined in
+ xmmintrin.h.
+
2000-10-30 Neil Booth <neilb@earthling.net>
* cppfiles.c (stack_include_file): Check for stacked contexts
tree_cons (NULL_TREE, integer_type_node,
endlink)));
tree v4hi_ftype_v4hi_int_int
- = build_function_type (integer_type_node,
+ = build_function_type (V4HI_type_node,
tree_cons (NULL_TREE, V4HI_type_node,
tree_cons (NULL_TREE, integer_type_node,
tree_cons (NULL_TREE,
arg1 = TREE_VALUE (TREE_CHAIN (arglist));
op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
- mode0 = insn_data[icode].operand[1].mode;
- mode1 = insn_data[icode].operand[2].mode;
+ mode0 = insn_data[icode].operand[0].mode;
+ mode1 = insn_data[icode].operand[1].mode;
- op0 = gen_rtx_MEM (mode0, copy_to_mode_reg (Pmode, op0));
- if (! (*insn_data[icode].operand[2].predicate) (op1, mode1))
+ if (! (*insn_data[icode].operand[1].predicate) (op1, mode1))
{
/* @@@ better error message */
error ("selector must be an immediate");
return const0_rtx;
}
+ op0 = copy_to_mode_reg (Pmode, op0);
pat = GEN_FCN (icode) (op0, op1);
if (! pat)
return 0;
(define_insn "sse_movntdi"
[(set (match_operand:DI 0 "memory_operand" "=m")
- (unspec:DI [(match_operand:DI 1 "register_operand" "x")] 34))]
+ (unspec:DI [(match_operand:DI 1 "register_operand" "y")] 34))]
"TARGET_SSE"
"movntq\\t{%1, %0|%0, %1}"
[(set_attr "type" "sse")])
(const_int 1)])))
(const_int 1)))]
"TARGET_SSE"
- "pavgbn\\t{%2, %0|%0, %2}"
+ "pavgb\\t{%2, %0|%0, %2}"
[(set_attr "type" "sse")])
(define_insn "mmx_uavgv4hi3"
(const_int 1)])))
(const_int 1)))]
"TARGET_SSE"
- "pavgwn\\t{%2, %0|%0, %2}"
+ "pavgw\\t{%2, %0|%0, %2}"
[(set_attr "type" "sse")])
(define_insn "mmx_psadbw"
[(set (match_operand:V8QI 0 "register_operand" "=y")
- (abs:V8QI (minus:V8QI (match_operand:DI 1 "register_operand" "0")
- (match_operand:DI 2 "nonimmediate_operand" "ym"))))]
+ (abs:V8QI (minus:V8QI (match_operand:V8QI 1 "register_operand" "0")
+ (match_operand:V8QI 2 "nonimmediate_operand" "ym"))))]
"TARGET_SSE"
- "padbw\\t{%2, %0|%0, %2}"
+ "psadbw\\t{%2, %0|%0, %2}"
[(set_attr "type" "sse")])
(const_int 1)]))
(const_int 5)))]
"TARGET_MMX"
- "punpckhbw\\t{%2, %0|%0, %2}"
+ "punpckhwd\\t{%2, %0|%0, %2}"
[(set_attr "type" "mmx")])
(define_insn "mmx_punpckhdq"
(const_int 0)]))
(const_int 1)))]
"TARGET_MMX"
- "punpckhbw\\t{%2, %0|%0, %2}"
+ "punpckhdq\\t{%2, %0|%0, %2}"
[(set_attr "type" "mmx")])
(define_insn "mmx_punpcklbw"
(const_int 3)]))
(const_int 5)))]
"TARGET_MMX"
- "punpcklbw\\t{%2, %0|%0, %2}"
+ "punpcklwd\\t{%2, %0|%0, %2}"
[(set_attr "type" "mmx")])
(define_insn "mmx_punpckldq"
(const_int 1)]))
(const_int 1)))]
"TARGET_MMX"
- "punpcklbw\\t{%2, %0|%0, %2}"
+ "punpckldq\\t{%2, %0|%0, %2}"
[(set_attr "type" "mmx")])
(define_insn "prefetch"
[(unspec [(match_operand:SI 0 "address_operand" "p")
- (match_operand:SI 1 "address_operand" "p")] 35)]
+ (match_operand:SI 1 "immediate_operand" "n")] 35)]
"TARGET_SSE"
"*
{
switch (INTVAL (operands[1]))
{
case 0:
- return \"prefetcht0\\t%0\";
+ return \"prefetchnta\\t%a0\";
case 1:
- return \"prefetcht1\\t%0\";
+ return \"prefetcht0\\t%a0\";
case 2:
- return \"prefetcht2\\t%0\";
+ return \"prefetcht1\\t%a0\";
case 3:
- return \"prefetchnta\\t%0\";
+ return \"prefetcht2\\t%a0\";
default:
abort ();
}