r300g: Guard R500 register writes by is_r500 check.

Flagged by the DRM command stream checker. This allows the driver to work on
non-R500 cards.

diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c
index 9f534b8ce3c261e50f73ae6591935e8ec5af800e..430129d5bd2d59d658d79d15925e55a1124b000c 100644 (file)
--- a/src/gallium/drivers/r300/r300_state_invariant.c
+++ b/src/gallium/drivers/r300/r300_state_invariant.c
@@ -72,7 +72,7 @@ void r300_emit_invariant_state(struct r300_context* r300)
     END_CS;
 
     /* XXX unsorted stuff from surface_fill */
-    BEGIN_CS(75 + (caps->has_tcl ? 5 : 0));
+    BEGIN_CS(71 + (caps->has_tcl ? 5 : 0) + (caps->is_r500 ? 4 : 0));
     /* Flush PVS. */
     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 
@@ -115,8 +115,10 @@ void r300_emit_invariant_state(struct r300_context* r300)
     OUT_CS_REG(R300_RB3D_CCTL, 0x00000000);
     OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F);
     OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000);
-    OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000);
-    OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF);
+    if (caps->is_r500) {
+        OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000);
+        OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF);
+    }
     OUT_CS_REG(R300_ZB_FORMAT, 0x00000002);
     OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003);
     OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000);