Revert "Do not do sign extension in techmap; let packer do it"

This reverts commit 595a8f032f1e9db385959f92a4a414a40de291fd.

diff --git a/techlibs/common/mul2dsp.v b/techlibs/common/mul2dsp.v
index b28a4247ed9bc2087ae2a4fa88a482c1be4ec068..99afce18c9171f680742095f38cca12554c2d94a 100644 (file)
--- a/techlibs/common/mul2dsp.v
+++ b/techlibs/common/mul2dsp.v
@@ -232,15 +232,24 @@ module \$__mul (A, B, Y);
                        assign Y = partial_sum[n-1];\r
                end\r
                else begin \r
+                       if (A_SIGNED)\r
+                               wire signed [`DSP_A_MAXWIDTH-1:0] Aext = $signed(A);\r
+                       else\r
+                               wire [`DSP_A_MAXWIDTH-1:0] Aext = A;\r
+                       if (B_SIGNED)\r
+                               wire signed [`DSP_B_MAXWIDTH-1:0] Bext = $signed(B);\r
+                       else\r
+                               wire [`DSP_B_MAXWIDTH-1:0] Bext = B;\r
+\r
                        `DSP_NAME #(\r
                                .A_SIGNED(A_SIGNED),\r
                                .B_SIGNED(B_SIGNED),\r
-                               .A_WIDTH(A_WIDTH),\r
-                               .B_WIDTH(B_WIDTH),\r
-                               .Y_WIDTH(`MIN(Y_WIDTH,A_WIDTH+B_WIDTH)),\r
+                               .A_WIDTH(`DSP_A_MAXWIDTH),\r
+                               .B_WIDTH(`DSP_B_MAXWIDTH),\r
+                               .Y_WIDTH(`MIN(Y_WIDTH,`DSP_A_MAXWIDTH+`DSP_B_MAXWIDTH)),\r
                        ) _TECHMAP_REPLACE_ (\r
-                               .A(A),\r
-                               .B(B),\r
+                               .A(Aext),\r
+                               .B(Bext),\r
                                .Y(Y)\r
                        );\r
                end\r