Removed top module where not needed

diff --git a/tests/ecp5/fsm.v b/tests/ecp5/fsm.v
index 0605bd102ddd727902c9714bfe768abd4ab83f5b..368fbaace5e8a1e87b98b937646cc700f049c241 100644 (file)
--- a/tests/ecp5/fsm.v
+++ b/tests/ecp5/fsm.v
@@ -52,22 +52,4 @@
  endcase\r
  end\r
 \r
- endmodule\r
-\r
- module top (\r
-input clk,\r
-input rst,\r
-input a,\r
-input b,\r
-output g0,\r
-output g1\r
-);\r
-\r
-fsm u_fsm ( .clock(clk),\r
-            .reset(rst),\r
-            .req_0(a),\r
-            .req_1(b),\r
-            .gnt_0(g0),\r
-            .gnt_1(g1));\r
-\r
 endmodule\r

diff --git a/tests/ecp5/fsm.ys b/tests/ecp5/fsm.ys
index 6368edc57c3049f687a3b778c296dbeca297922c..ded91e5f7deaed58b3a0155adccf0df034477cac 100644 (file)
--- a/tests/ecp5/fsm.ys
+++ b/tests/ecp5/fsm.ys
@@ -1,10 +1,10 @@
 read_verilog fsm.v
-hierarchy -top top
+hierarchy -top fsm
 proc
 flatten
 equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check
 design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
-cd top # Constrain all select calls below inside the top module
+cd fsm # Constrain all select calls below inside the top module
 select -assert-count 1 t:L6MUX21
 select -assert-count 13 t:LUT4
 select -assert-count 5 t:PFUMX

diff --git a/tests/ecp5/tribuf.v b/tests/ecp5/tribuf.v
index 870a0258412efadf17e29e5a41dd6d49d09767a3..90dd314e4728c20accf90b5dbdc058a1a66e7490 100644 (file)
--- a/tests/ecp5/tribuf.v
+++ b/tests/ecp5/tribuf.v
@@ -6,18 +6,3 @@ module tristate (en, i, o);
        assign o = en ? i : 1'bz;
 
 endmodule
-
-
-module top (
-input en,
-input a,
-output b
-);
-
-tristate u_tri (
-        .en (en ),
-        .i (a ),
-        .o (b )
-    );
-
-endmodule

diff --git a/tests/ecp5/tribuf.ys b/tests/ecp5/tribuf.ys
index f454a0c022702404a7c37ae8e4c717890883c949..a6e9c9598346c6c5ef419773a14c6385ba09fea8 100644 (file)
--- a/tests/ecp5/tribuf.ys
+++ b/tests/ecp5/tribuf.ys
@@ -1,9 +1,9 @@
 read_verilog tribuf.v
-hierarchy -top top
+hierarchy -top tristate
 proc
 flatten
 equiv_opt -assert -map +/ecp5/cells_sim.v -map +/simcells.v synth_ecp5 # equivalency check
 design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
-cd top # Constrain all select calls below inside the top module
+cd tristate # Constrain all select calls below inside the top module
 select -assert-count 1 t:$_TBUF_
 select -assert-none t:$_TBUF_ %% t:* %D