projects
/
riscv-isa-sim.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
1d07d41
)
list of instructions to avoid parallelising
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sun, 30 Sep 2018 09:37:05 +0000
(10:37 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Sun, 30 Sep 2018 09:37:05 +0000
(10:37 +0100)
id_regs.py
patch
|
blob
|
history
diff --git
a/id_regs.py
b/id_regs.py
index e897d63944df3d8eb7debc4daf06e2c2107674f8..b705ec7210e6c71969ef79eeb1331666c8162de3 100644
(file)
--- a/
id_regs.py
+++ b/
id_regs.py
@@
-55,9
+55,11
@@
allints = intpatterns + cintpatterns[2:]
skip = '#define USING_NOREGS\n' \
'#define REGS_PATTERN 0x0\n'
def find_registers(fname):
- # HACK! macro-skipping csr* instructions too painful
- if 'csr' in fname or 'lui' in fname:
- return skip
+ # HACK! macro-skipping of instructions too painful
+ for notparallel in ['csr', 'lui', 'c_j', 'wfi', 'auipc',
+ 'dret', 'uret', 'mret', 'sret']:
+ if notparallel in fname:
+ return skip
res = []
isintfloat = 0x0 + floatmask << len(allints)
with open(fname) as f: