freedreno/ir3: fix kill scheduling
authorRob Clark <robdclark@chromium.org>
Thu, 23 Jan 2020 18:26:27 +0000 (10:26 -0800)
committerMarge Bot <eric+marge@anholt.net>
Sat, 1 Feb 2020 02:40:22 +0000 (02:40 +0000)
kill (and other cat0/flow instructions) do not have a dst register.
Which was mostly harmless before, other than RA thinking it would need
a free register to write.  (But nothing consumed it, so the value would
be immediately dead.)  But this would cause more problems with postsched
which would see a bogus dependency.

Also, post-RA sched *does* need to see the dependency on the predicate
register.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

src/freedreno/ir3/ir3.h
src/freedreno/ir3/ir3_compiler_nir.c

index b9cf06e636d89ed19b92f5efedc643d2d260f632..b10f2f0da79c4e9ac4c5096482691e6e1102e001 100644 (file)
@@ -794,7 +794,7 @@ static inline bool is_meta(struct ir3_instruction *instr)
 
 static inline unsigned dest_regs(struct ir3_instruction *instr)
 {
-       if ((instr->regs_count == 0) || is_store(instr))
+       if ((instr->regs_count == 0) || is_store(instr) || is_flow(instr))
                return 0;
 
        return util_last_bit(instr->regs[0]->wrmask);
index c5a1f915b9c61804fe6f77abd62b65a4f74cdd19..13052648814fd4ce91e192ff9581bf43ff246bdc 100644 (file)
@@ -1780,6 +1780,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
                cond->regs[0]->flags &= ~IR3_REG_SSA;
 
                kill = ir3_KILL(b, cond, 0);
+               kill->regs[1]->num = regid(REG_P0, 0);
                array_insert(ctx->ir, ctx->ir->predicates, kill);
 
                array_insert(b, b->keeps, kill);