winsys/amdgpu: addrlib - port Checks mip 0 for czDispCompatible

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

diff --git a/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp b/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp
index 110e3d007b8187f5e4f90bffd25a2bf200ad4d55..088b64593ba5426d2f15d6b5f5c4c25ad1e10b80 100644 (file)
--- a/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp
+++ b/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp
@@ -352,6 +352,7 @@ BOOL_32 EgBasedAddrLib::ComputeSurfaceInfoMicroTiled(
     ComputeSurfaceAlignmentsMicroTiled(expTileMode,
                                        pIn->bpp,
                                        pIn->flags,
+                                       pIn->mipLevel,
                                        numSamples,
                                        &pOut->baseAlign,
                                        &pOut->pitchAlign,
@@ -647,6 +648,7 @@ BOOL_32 EgBasedAddrLib::ComputeSurfaceAlignmentsMicroTiled(
     AddrTileMode        tileMode,          ///< [in] tile mode
     UINT_32             bpp,               ///< [in] bits per pixel
     ADDR_SURFACE_FLAGS  flags,             ///< [in] surface flags
+    UINT_32             mipLevel,          ///< [in] mip level
     UINT_32             numSamples,        ///< [in] number of samples
     UINT_32*            pBaseAlign,        ///< [out] base address alignment in bytes
     UINT_32*            pPitchAlign,       ///< [out] pitch alignment in pixels
@@ -669,7 +671,7 @@ BOOL_32 EgBasedAddrLib::ComputeSurfaceAlignmentsMicroTiled(
     // ECR#393489
     // Workaround 2 for 1D tiling -  There is HW bug for Carrizo
     // where it requires the following alignments for 1D tiling.
-    if (flags.czDispCompatible)
+    if (flags.czDispCompatible && (mipLevel == 0))
     {
         *pBaseAlign  = PowTwoAlign(*pBaseAlign, 4096);                         //Base address MOD 4096 = 0
         *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 / (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0

diff --git a/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.h b/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.h
index 84adb66eedcee5b2dcfc56b438c4dcaf49dc0eef..25e38964be0dbe092eae746c8039853efba4bc37 100644 (file)
--- a/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.h
+++ b/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.h
@@ -315,7 +315,8 @@ private:
         UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const;
 
     BOOL_32 ComputeSurfaceAlignmentsMicroTiled(
-        AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples,
+        AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
+        UINT_32 mipLevel, UINT_32 numSamples,
         UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const;
 
     BOOL_32 ComputeSurfaceAlignmentsMacroTiled(