Fix ldah being disassembled as ldaexh
authorAndre Vieira <Andre dot SimoesDiasVieira at arm dot com>
Wed, 25 Nov 2015 13:56:55 +0000 (13:56 +0000)
committerThomas Preud'homme <thomas.preudhomme@arm.com>
Wed, 2 Dec 2015 01:26:58 +0000 (09:26 +0800)
2015-12-02  Andre Vieira  <andre.simoesdiasvieira@arm.com>

opcodes/
    * arm-dis.c (arm_opcodes): <ldaexh>: Fix typo...
    <ldah>: ... to this.

gas/testsuite/
    * gas/arm/armv8-a.d: <ldaexh>: Rename mismatched mnemonics ...
    <ldah>: ... to this.

gas/testsuite/ChangeLog
gas/testsuite/gas/arm/armv8-a.d
opcodes/ChangeLog
opcodes/arm-dis.c

index e73a977ed53206ef2568162ae260d08597d49ca8..f3ffe38f6dc878690b7f73558bef9df776884cfb 100644 (file)
@@ -1,3 +1,8 @@
+2015-12-02  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+       * gas/arm/armv8-a.d: <ldaexh>: Rename mismatched mnemonics ...
+       <ldah>: ... to this.
+
 2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>
 
        * gas/aarch64/float-fp16.d: New.
index 60e5067524065085efc1e18d68eb7cbb9f257533..2119bcbd21bfb203dfb0a535f7a2e47d5530208a 100644 (file)
@@ -32,9 +32,9 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> e1d00c9f    ldab    r0, \[r0\]
 0[0-9a-f]+ <[^>]+> e1d11c9f    ldab    r1, \[r1\]
 0[0-9a-f]+ <[^>]+> e1deec9f    ldab    lr, \[lr\]
-0[0-9a-f]+ <[^>]+> e1f00c9f    ldaexh  r0, \[r0\]
-0[0-9a-f]+ <[^>]+> e1f11c9f    ldaexh  r1, \[r1\]
-0[0-9a-f]+ <[^>]+> e1feec9f    ldaexh  lr, \[lr\]
+0[0-9a-f]+ <[^>]+> e1f00c9f    ldah    r0, \[r0\]
+0[0-9a-f]+ <[^>]+> e1f11c9f    ldah    r1, \[r1\]
+0[0-9a-f]+ <[^>]+> e1feec9f    ldah    lr, \[lr\]
 0[0-9a-f]+ <[^>]+> e1900c9f    lda     r0, \[r0\]
 0[0-9a-f]+ <[^>]+> e1911c9f    lda     r1, \[r1\]
 0[0-9a-f]+ <[^>]+> e19eec9f    lda     lr, \[lr\]
index 8024b52385b6ab950757190647c2b913b4667ea0..7b097f378ec65f4e466e4e922d22950f8e525f98 100644 (file)
@@ -1,3 +1,8 @@
+2015-12-02  Andre Vieira  <andre.simoesdiasvieira@arm.com>
+
+       * arm-dis.c (arm_opcodes): <ldaexh>: Fix typo...
+       <ldah>: ... to this.
+
 2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>
 
        * aarch64-asm-2.c: Regenerate.
index cff4b3fcb6d260b664e348541098958260c10e77..94fe304f5ac68bfea77528770038935d9f0c0feb 100644 (file)
@@ -1608,7 +1608,7 @@ static const struct opcode32 arm_opcodes[] =
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V8),
     0x01e0fc90, 0x0ff0fff0, "stlh%c\t%0-3r, [%16-19R]"},
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V8),
-    0x01f00c9f, 0x0ff00fff, "ldaexh%c\t%12-15r, [%16-19R]"},
+    0x01f00c9f, 0x0ff00fff, "ldah%c\t%12-15r, [%16-19R]"},
   /* CRC32 instructions.  */
   {ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
     0xe1000040, 0xfff00ff0, "crc32b\t%12-15R, %16-19R, %0-3R"},