braces:
@smallexample
+@group
@{
[@var{format}]
@var{opcode0} [@var{operands}]
+@end group
@var{opcode1} [@var{operands}]
+@group
@var{opcode2} [@var{operands}]
@dots{}
@}
+@end group
@end smallexample
The opcodes in a FLIX instruction are listed in the same order as the
may result in:
@smallexample
+@group
bnez.n a2, M
j L
M:
+@end group
@end smallexample
(The @code{BNEZ.N} instruction would be used in this example only if the
might be relaxed to:
@smallexample
+@group
.literal .L1, func
l32r a8, .L1
callx8 a8
+@end group
@end smallexample
Because the addresses of targets of function calls are not generally
is assembled into the following machine code:
@smallexample
+@group
.literal .L1, 100000
l32r a0, .L1
+@end group
@end smallexample
@cindex @code{L8UI} instructions, relaxation
is translated to:
@smallexample
+@group
.literal .L1, 2040
l32r a1, .L1
+@end group
+@group
addi a1, a0, a1
l32i a1, a1, 0
+@end group
@end smallexample
@noindent
For example:
@smallexample
+@group
addi a5, a6, 0
addi a5, a6, 512
+@end group
+@group
addi a5, a6, 513
addi a5, a6, 50000
+@end group
@end smallexample
is assembled into the following:
@smallexample
+@group
.literal .L1, 50000
mov.n a5, a6
+@end group
addmi a5, a6, 0x200
addmi a5, a6, 0x200
addi a5, a5, 1
+@group
l32r a5, .L1
add a5, a6, a5
+@end group
@end smallexample
@node Xtensa Directives
The Xtensa assembler supports a region-based directive syntax:
@smallexample
+@group
.begin @var{directive} [@var{options}]
@dots{}
.end @var{directive}
+@end group
@end smallexample
All the Xtensa-specific directives that apply to a region of code use
outer state. For example, consider:
@smallexample
+@group
.begin no-transform
L: add a0, a1, a2
+@end group
.begin transform
M: add a0, a1, a2
.end transform
+@group
N: add a0, a1, a2
.end no-transform
+@end group
@end smallexample
The @code{ADD} opcodes at @code{L} and @code{N} in the outer
Tensilica's assembler.
@smallexample
+@group
.begin [no-]schedule
.end [no-]schedule
+@end group
@end smallexample
This directive is ignored and has no effect on @command{@value{AS}}.
relaxation. @xref{Xtensa Call Relaxation, ,Function Call Relaxation}.
@smallexample
+@group
.begin [no-]longcalls
.end [no-]longcalls
+@end group
@end smallexample
Call relaxation is disabled by default unless the @samp{--longcalls}
optimization (@pxref{Xtensa Optimizations, ,Xtensa Optimizations}).
@smallexample
+@group
.begin [no-]transform
.end [no-]transform
+@end group
@end smallexample
Transformations are enabled by default unless the @samp{--no-transform}
identical literals. For example, the code:
@smallexample
+@group
entry sp, 40
.literal .L1, sym
l32r a4, .L1
+@end group
@end smallexample
can be used to load a pointer to the symbol @code{sym} into register
the unconditional jump.
@smallexample
+@group
.global M
code_start:
+@end group
j continue
.literal_position
.align 4
+@group
continue:
movi a4, M
+@end group
@end smallexample
@node Literal Prefix Directive
where the literals are defined.
@smallexample
+@group
.begin literal_prefix [@var{name}]
.end literal_prefix
+@end group
@end smallexample
For literals defined within the delimited region, the literal section
include the absolute addressing option for @code{L32R} instructions.
@smallexample
+@group
.begin [no-]absolute-literals
.end [no-]absolute-literals
+@end group
@end smallexample
These directives do not change the @code{L32R} mode---they only cause