re PR target/82267 (x32: unnecessary address-size prefixes. Why isn't -maddress...

	PR target/82267
	* config/i386/i386.c (ix86_print_operand_address_as): Only test
	REGNO (base) == SP_REG if base is a REG.

From-SVN: r253202

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 71d8a309f62bcbc65aa12460eb3df749f392e378..2129d7a956b42ba32ce013ce5e0d4aab36507fd6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,9 @@
 2017-09-26  Jakub Jelinek  <jakub@redhat.com>
 
+       PR target/82267
+       * config/i386/i386.c (ix86_print_operand_address_as): Only test
+       REGNO (base) == SP_REG if base is a REG.
+
        PR middle-end/35691
        * tree-ssa-reassoc.c (update_range_test): Dump r->exp each time
        if it is different SSA_NAME.

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index d52d1df251c6f3e7a189608bd824bb7ef9013ce4..63db7ac2b5f5c89767f9ef3fa49c4e6dd6e374b5 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -19957,7 +19957,7 @@ ix86_print_operand_address_as (FILE *file, rtx addr,
         encode %esp as %rsp to avoid 0x67 prefix if there is no index or
         base register.  */
       if (TARGET_X32 && Pmode == SImode
-         && ((!index && base && REGNO (base) == SP_REG)
+         && ((!index && base && REG_P (base) && REGNO (base) == SP_REG)
              || (!base && index && REGNO (index) == SP_REG)))
        code = 'q';