}
}};
-// Declarations for execute() methods.
-def template BasicExecDeclare {{
- Fault execute(ExecContext *, Trace::InstRecord *) const;
-}};
-
// Basic instruction class declaration template.
def template BasicDeclare {{
/**
/// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
/// Helper function for decoding nops. Substitute Nop object
/// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(BasicExecDeclare)s
-
- %(EACompDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault eaComp(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
-
-def template EACompDeclare {{
- Fault eaComp(ExecContext *, Trace::InstRecord *) const;
-}};
-
-def template InitiateAccDeclare {{
- Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
-}};
-
-
-def template CompleteAccDeclare {{
- Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
-}};
-
def template LoadStoreConstructor {{
%(class_name)s::%(class_name)s(ExtMachInst machInst)
: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
{
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
return microOps[microPC];
}
+ Fault
+ execute(ExecContext *, Trace::InstRecord *) const
+ {
+ panic("Execute method called when it shouldn't!");
+ }
+
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
nextIdxs(_dest, _op1);
}
}
-
- %(BasicExecPanic)s
};
template <class VfpOp>
nextIdxs(_dest);
}
}
-
- %(BasicExecPanic)s
};
template <class VfpOp>
nextIdxs(_dest, _op1);
}
}
-
- %(BasicExecPanic)s
};
template <class VfpOp>
nextIdxs(_dest, _op1, _op2);
}
}
-
- %(BasicExecPanic)s
};
template <class VfpOp>
//
// Authors: Stephen Hines
-// Declarations for execute() methods.
-def template BasicExecDeclare {{
- Fault execute(ExecContext *, Trace::InstRecord *) const;
-}};
-
// Basic instruction class declaration template.
def template BasicDeclare {{
/**
public:
/// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
def template BasicDecodeWithMnemonic {{
return new %(class_name)s("%(mnemonic)s", machInst);
}};
-
-// Definitions of execute methods that panic.
-def template BasicExecPanic {{
-Fault execute(ExecContext *, Trace::InstRecord *) const
-{
- panic("Execute method called when it shouldn't!");
- // GCC < 4.3 fail to recognize the above panic as no return
- return NoFault;
-}
-}};
public:
// Constructor
%(class_name)s(ExtMachInst machInst, int32_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, int32_t _imm,
ConditionCode _condCode);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
ArmISA::PCState branchTarget(const ArmISA::PCState &branchPC) const;
/// Explicitly import the otherwise hidden branchTarget
public:
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _op1);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _op1,
ConditionCode _condCode);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst,
IntRegIndex _op1, IntRegIndex _op2);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst,
IntRegIndex _op1, IntRegIndex _op2);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst,
int32_t imm, IntRegIndex _op1);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
ArmISA::PCState branchTarget(const ArmISA::PCState &branchPC) const;
/// Explicitly import the otherwise hidden branchTarget
public:
// Constructor
%(class_name)s(ExtMachInst machInst, int64_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, int64_t _imm,
ConditionCode _condCode);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
public:
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _op1);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst,
int64_t imm, IntRegIndex _op1);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, int64_t _imm1, int64_t _imm2,
IntRegIndex _op1);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _op1, uint64_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _op1, IntRegIndex _op2,
int32_t _shiftAmt, ArmShiftType _shiftType);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _op1, IntRegIndex _op2,
ArmExtendType _extendType, int32_t _shiftAmt);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _op1);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _op1, IntRegIndex _op2);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _op1, IntRegIndex _op2, uint64_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _op3);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _op1,
uint64_t _imm, ConditionCode _condCode, uint8_t _defCc);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst, IntRegIndex _op1,
IntRegIndex _op2, ConditionCode _condCode,
uint8_t _defCc);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _op1, IntRegIndex _op2,
ConditionCode _condCode);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
RegIndex _ura, RegIndex _urb, bool _up,
uint8_t _imm);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
RegIndex _dreg1, RegIndex _dreg2, RegIndex _base,
bool _up, uint8_t _imm);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
}
}
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
IntRegIndex _ura,
IntRegIndex _urb,
IntRegIndex _urc);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
public:
%(class_name)s(ExtMachInst machInst,
RegIndex _ura, RegIndex _urb, RegIndex _urc);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
}
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
}
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
public:
%(class_name)s(ExtMachInst machInst,
RegIndex _ura, RegIndex _urb);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
def template MicroIntMovConstructor {{
%(class_name)s(ExtMachInst machInst,
RegIndex _ura, RegIndex _urb,
int32_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
RegIndex _ura, RegIndex _urb, RegIndex _urc,
int32_t _shiftAmt, ArmShiftType _shiftType);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
RegIndex _ura, RegIndex _urb, RegIndex _urc,
ArmExtendType _type, uint32_t _shiftAmt);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst, IntRegIndex rn,
bool index, bool up, bool user, bool writeback, bool load,
uint32_t reglist);
- %(BasicExecPanic)s
};
}};
// Constructor
%(class_name)s(const char *mnemonic, ExtMachInst machInst,
bool load, IntRegIndex dest, IntRegIndex base, int64_t imm);
- %(BasicExecPanic)s
};
}};
%(class_name)s(const char *mnemonic, ExtMachInst machInst,
bool load, IntRegIndex dest, IntRegIndex base,
IntRegIndex offset, ArmExtendType type, int64_t imm);
- %(BasicExecPanic)s
};
}};
// Constructor
%(class_name)s(const char *mnemonic, ExtMachInst machInst,
IntRegIndex dest, int64_t imm);
- %(BasicExecPanic)s
};
}};
bool exclusive, bool acrel, uint32_t imm,
AddrMode mode, IntRegIndex rn, IntRegIndex rt,
IntRegIndex rt2);
- %(BasicExecPanic)s
};
}};
%(class_name)s(ExtMachInst machInst, unsigned width,
RegIndex rn, RegIndex vd, unsigned regs, unsigned inc,
uint32_t size, uint32_t align, RegIndex rm);
- %(BasicExecPanic)s
};
}};
%(class_name)s(ExtMachInst machInst, bool all, unsigned width,
RegIndex rn, RegIndex vd, unsigned regs, unsigned inc,
uint32_t size, uint32_t align, RegIndex rm, unsigned lane = 0);
- %(BasicExecPanic)s
};
}};
%(class_name)s(ExtMachInst machInst, IntRegIndex rn,
RegIndex vd, bool single, bool up, bool writeback,
bool load, uint32_t offset);
- %(BasicExecPanic)s
};
}};
%(class_name)s(ExtMachInst machInst,
uint32_t _base, int _mode, bool _wb);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
uint32_t _regMode, int _mode, bool _wb);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
uint32_t _dest, uint32_t _op1, uint32_t _base);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
uint32_t _dest, uint32_t _dest2,
uint32_t _base, bool _add, int32_t _imm);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
uint32_t _result, uint32_t _dest, uint32_t _dest2,
uint32_t _base, bool _add, int32_t _imm);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
uint32_t _dest, uint32_t _base, bool _add, int32_t _imm);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
uint32_t _result, uint32_t _dest, uint32_t _base,
bool _add, int32_t _imm);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
int32_t _shiftAmt, uint32_t _shiftType,
uint32_t _index);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
int32_t _shiftAmt, uint32_t _shiftType,
uint32_t _index);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
int32_t _shiftAmt, uint32_t _shiftType,
uint32_t _index);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
int32_t _shiftAmt, uint32_t _shiftType,
uint32_t _index);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
%(class_name)s(ExtMachInst machInst,
uint32_t _dest, uint32_t _base, bool _add, int32_t _imm);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
};
}};
-def template InitiateAccDeclare {{
- Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
-}};
-
-def template CompleteAccDeclare {{
- Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
-}};
-
def template RfeConstructor {{
%(class_name)s::%(class_name)s(ExtMachInst machInst,
uint32_t _base, int _mode, bool _wb)
/// Constructor.
%(class_name)s(ExtMachInst machInst, IntRegIndex _base, IntRegIndex _dest, uint64_t _imm);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _base, int64_t _imm);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
bool noAlloc = false, bool exclusive = false,
bool acrel = false);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
int64_t _imm = 0, bool noAlloc = false, bool exclusive = false,
bool acrel = false);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
IntRegIndex _result, IntRegIndex _dest, IntRegIndex _dest2,
IntRegIndex _base, int64_t _imm = 0);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
IntRegIndex _dest, IntRegIndex _base, IntRegIndex _offset,
ArmExtendType _type, uint32_t _shiftAmt);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
bool noAlloc = false, bool exclusive = false,
bool acrel = false);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _base);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _base, IntRegIndex _result);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
/// Constructor.
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, int64_t _imm);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
bool noAlloc = false, bool exclusive = false,
bool acrel = false);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
virtual void
annotateFault(ArmFault *fault) {
public:
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
uint8_t _sysM, bool _r);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _op1,
uint8_t _sysM, bool _r);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
public:
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _op1, uint8_t mask);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
public:
// Constructor
%(class_name)s(ExtMachInst machInst, uint32_t imm, uint8_t mask);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, MiscRegIndex _op1,
IntRegIndex _dest, IntRegIndex _dest2, uint32_t imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2,
MiscRegIndex _dest, uint32_t imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
public:
// Constructor
%(class_name)s(ExtMachInst machInst, uint64_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
public:
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
uint64_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1,
IntRegIndex _op2, IntRegIndex _op3);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1,
uint64_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
MiscRegIndex _dest, IntRegIndex _op1,
uint64_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, MiscRegIndex _op1,
uint64_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, uint64_t _imm1, uint64_t _imm2);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1,
uint64_t _imm1, uint64_t _imm2);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1,
int32_t _shiftAmt, ArmShiftType _shiftType);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1,
uint64_t _imm1, uint64_t _imm2);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1,
IntRegIndex _op2, uint64_t _imm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _reg0,
IntRegIndex _reg1, IntRegIndex _reg2);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _reg0, IntRegIndex _reg1,
IntRegIndex _reg2, IntRegIndex _reg3);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
}
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
}
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
}
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
}
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
}
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(constructor)s;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(constructor)s;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(constructor)s;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(constructor)s;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(constructor)s;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(constructor)s;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(constructor)s;
}
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst, RegIndex rn, RegIndex vd,
RegIndex rm, uint8_t eSize, uint8_t dataSize,
uint8_t numStructElems, uint8_t numRegs, bool wb);
- %(BasicExecPanic)s
};
}};
RegIndex rm, uint8_t eSize, uint8_t dataSize,
uint8_t numStructElems, uint8_t index, bool wb,
bool replicate = false);
- %(BasicExecPanic)s
};
}};
%(constructor)s;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(constructor)s;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _op1, uint32_t _imm, bool _rotC=true);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _op1, IntRegIndex _op2,
int32_t _shiftAmt, ArmShiftType _shiftType);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
IntRegIndex _op1, IntRegIndex _op2, IntRegIndex _shift,
ArmShiftType _shiftType);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1,
VfpMicroMode mode = VfpNotAMicroop);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Constructor
%(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
uint64_t _imm, VfpMicroMode mode = VfpNotAMicroop);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1,
uint64_t _imm, VfpMicroMode mode = VfpNotAMicroop);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
VfpMicroMode mode = VfpNotAMicroop);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
ConditionCode _cond,
VfpMicroMode mode = VfpNotAMicroop);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
IntRegIndex _op3, VfpMicroMode mode = VfpNotAMicroop);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Authors: Steve Reinhardt
// Korey Sewell
-// Declarations for execute() methods.
-def template BasicExecDeclare {{
- Fault execute(ExecContext *, Trace::InstRecord *) const;
-}};
-
// Basic instruction class declaration template.
def template BasicDeclare {{
/**
public:
/// Constructor.
%(class_name)s(MachInst machInst);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
/// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(BasicExecDeclare)s
-
- %(EACompDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault eaComp(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(Packet *, ExecContext *, Trace::InstRecord *) const;
};
}};
-def template EACompDeclare {{
- Fault eaComp(ExecContext *, Trace::InstRecord *) const;
-}};
-
-def template InitiateAccDeclare {{
- Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
-}};
-
-
-def template CompleteAccDeclare {{
- Fault completeAcc(Packet *, ExecContext *, Trace::InstRecord *) const;
-}};
def template LoadStoreConstructor {{
%(class_name)s::%(class_name)s(ExtMachInst machInst)
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
//
// Authors: Timothy M. Jones
-// Declarations for execute() methods.
-def template BasicExecDeclare {{
- Fault execute(ExecContext *, Trace::InstRecord *) const;
-}};
-
// Basic instruction class declaration template.
def template BasicDeclare {{
/**
public:
/// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
return new %(class_name)s("%(mnemonic)s", machInst);
}};
-// Definitions of execute methods that panic.
-def template BasicExecPanic {{
-Fault execute(ExecContext *, Trace::InstRecord *) const
-{
- panic("Execute method called when it shouldn't!");
-}
-}};
-
// The most basic instruction format...
def format BasicOp(code, *flags) {{
iop = InstObjParams(name, Name, 'PowerStaticInst', code, flags)
/// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
-def template InitiateAccDeclare {{
- Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
-}};
-
-
-def template CompleteAccDeclare {{
- Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
-}};
-
-
def template LoadStoreConstructor {{
%(class_name)s::%(class_name)s(ExtMachInst machInst)
: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+++ /dev/null
-// -*- mode:c++ -*-
-
-// Copyright (c) 2015 RISC-V Foundation
-// Copyright (c) 2016 The University of Virginia
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are
-// met: redistributions of source code must retain the above copyright
-// notice, this list of conditions and the following disclaimer;
-// redistributions in binary form must reproduce the above copyright
-// notice, this list of conditions and the following disclaimer in the
-// documentation and/or other materials provided with the distribution;
-// neither the name of the copyright holders nor the names of its
-// contributors may be used to endorse or promote products derived from
-// this software without specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Authors: Maxwell Walter
-// Alec Roelke
-
-////////////////////////////////////////////////////////////////////
-//
-// Base class for Riscv instructions, and some support functions
-//
-
-//Outputs to decoder.hh
-output header {{
- using namespace RiscvISA;
-
- /**
- * Base class for all RISC-V static instructions.
- */
- class RiscvStaticInst : public StaticInst
- {
- protected:
- // Constructor
- RiscvStaticInst(const char *mnem, MachInst _machInst,
- OpClass __opClass) : StaticInst(mnem, _machInst, __opClass)
- {}
-
- virtual std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const = 0;
-
- public:
- void
- advancePC(RiscvISA::PCState &pc) const
- {
- pc.advance();
- }
- };
-}};
// Constructor
%(class_name)sLoad(ExtMachInst machInst, %(class_name)s *_p);
- %(BasicExecDeclare)s
-
- %(EACompDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault eaComp(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const;
};
class %(class_name)sStore : public %(base_class)sMicro
// Constructor
%(class_name)sStore(ExtMachInst machInst, %(class_name)s *_p);
- %(BasicExecDeclare)s
-
- %(EACompDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault eaComp(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const;
};
};
}};
// Authors: Maxwell Walter
// Alec Roelke
-// Declarations for execute() methods.
-def template BasicExecDeclare {{
- Fault execute(ExecContext *, Trace::InstRecord *) const;
-}};
-
// Basic instruction class declaration template.
def template BasicDeclare {{
//
public:
/// Constructor.
%(class_name)s(MachInst machInst);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
using %(base_class)s::generateDisassembly;
};
}};
/// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(BasicExecDeclare)s
-
- %(EACompDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault eaComp(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
-def template EACompDeclare {{
- Fault
- eaComp(ExecContext *, Trace::InstRecord *) const;
-}};
-
-def template InitiateAccDeclare {{
- Fault
- initiateAcc(ExecContext *, Trace::InstRecord *) const;
-}};
-
-
-def template CompleteAccDeclare {{
- Fault
- completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
-}};
def template LoadStoreConstructor {{
%(class_name)s::%(class_name)s(ExtMachInst machInst):
public:
/// Constructor.
%(class_name)s(MachInst machInst);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string generateDisassembly(Addr pc,
const SymbolTable *symtab) const override;
};
public:
/// Constructor.
%(class_name)s(MachInst machInst);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const override;
public:
/// Constructor.
%(class_name)s(MachInst machInst);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const override;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
#include <tuple>
#include <vector>
+#include "arch/riscv/static_inst.hh"
#include "cpu/static_inst.hh"
#include "mem/packet.hh"
#include "mem/request.hh"
//Include the operand_types and operand definitions
##include "operands.isa"
-//Include the base class for riscv instructions, and some support code
-##include "base.isa"
-
-// Include the base class for instructions with micro code
-##include "micro.isa"
-
//Include the definitions for the instruction formats
##include "formats/formats.isa"
+++ /dev/null
-// -*- mode:c++ -*-
-
-// Copyright (c) 2015 Riscv Developers
-// Copyright (c) 2016 The University of Virginia
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are
-// met: redistributions of source code must retain the above copyright
-// notice, this list of conditions and the following disclaimer;
-// redistributions in binary form must reproduce the above copyright
-// notice, this list of conditions and the following disclaimer in the
-// documentation and/or other materials provided with the distribution;
-// neither the name of the copyright holders nor the names of its
-// contributors may be used to endorse or promote products derived from
-// this software without specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Authors: Alec Roelke
-
-def template MacroInitiateAcc {{
- Fault initiateAcc(ExecContext *xc, Trace::InstRecord *traceData) const
- {
- panic("Tried to execute a macroop directly!\n");
- return NoFault;
- }
-}};
-
-def template MacroCompleteAcc {{
- Fault completeAcc(PacketPtr pkt, ExecContext *xc,
- Trace::InstRecord *traceData) const
- {
- panic("Tried to execute a macroop directly!\n");
- return NoFault;
- }
-}};
-
-def template MacroExecute {{
- Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const
- {
- panic("Tried to execute a macroop directly!\n");
- return NoFault;
- }
-}};
-
-output header {{
- /**
- * Base class for all RISC-V Macroops
- */
- class RiscvMacroInst : public RiscvStaticInst
- {
- protected:
- std::vector<StaticInstPtr> microops;
-
- // Constructor
- RiscvMacroInst(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass)
- : RiscvStaticInst(mnem, _machInst, __opClass)
- {
- flags[IsMacroop] = true;
- }
-
- ~RiscvMacroInst()
- {
- microops.clear();
- }
-
- StaticInstPtr fetchMicroop(MicroPC upc) const
- {
- return microops[upc];
- }
-
- %(MacroInitiateAcc)s
-
- %(MacroCompleteAcc)s
-
- %(MacroExecute)s
- };
-
- /**
- * Base class for all RISC-V Microops
- */
- class RiscvMicroInst : public RiscvStaticInst
- {
- protected:
- // Constructor
- RiscvMicroInst(const char *mnem, ExtMachInst _machInst,
- OpClass __opClass)
- : RiscvStaticInst(mnem, _machInst, __opClass)
- {
- flags[IsMicroop] = true;
- }
-
- void advancePC(RiscvISA::PCState &pcState) const
- {
- if (flags[IsLastMicroop]) {
- pcState.uEnd();
- } else {
- pcState.uAdvance();
- }
- }
- };
-}};
--- /dev/null
+// -*- mode:c++ -*-
+
+// Copyright (c) 2015 RISC-V Foundation
+// Copyright (c) 2016 The University of Virginia
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met: redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer;
+// redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution;
+// neither the name of the copyright holders nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+// Authors: Maxwell Walter
+// Alec Roelke
+
+#ifndef __ARCH_RISCV_STATIC_INST_HH__
+#define __ARCH_RISCV_STATIC_INST_HH__
+
+////////////////////////////////////////////////////////////////////
+//
+// Base class for Riscv instructions, and some support functions
+//
+
+namespace RiscvISA {
+
+/**
+ * Base class for all RISC-V static instructions.
+ */
+class RiscvStaticInst : public StaticInst
+{
+ protected:
+ // Constructor
+ RiscvStaticInst(const char *mnem, MachInst _machInst,
+ OpClass __opClass) : StaticInst(mnem, _machInst, __opClass)
+ {}
+
+ virtual std::string
+ generateDisassembly(Addr pc, const SymbolTable *symtab) const = 0;
+
+ public:
+ void
+ advancePC(RiscvISA::PCState &pc) const
+ {
+ pc.advance();
+ }
+};
+
+/**
+ * Base class for all RISC-V Macroops
+ */
+class RiscvMacroInst : public RiscvStaticInst
+{
+ protected:
+ std::vector<StaticInstPtr> microops;
+
+ // Constructor
+ RiscvMacroInst(const char *mnem, ExtMachInst _machInst,
+ OpClass __opClass) :
+ RiscvStaticInst(mnem, _machInst, __opClass)
+ {
+ flags[IsMacroop] = true;
+ }
+
+ ~RiscvMacroInst()
+ {
+ microops.clear();
+ }
+
+ StaticInstPtr
+ fetchMicroop(MicroPC upc) const
+ {
+ return microops[upc];
+ }
+
+ Fault
+ initiateAcc(ExecContext *xc, Trace::InstRecord *traceData) const
+ {
+ panic("Tried to execute a macroop directly!\n");
+ }
+
+ Fault
+ completeAcc(PacketPtr pkt, ExecContext *xc,
+ Trace::InstRecord *traceData) const
+ {
+ panic("Tried to execute a macroop directly!\n");
+ }
+
+ Fault
+ execute(ExecContext *xc, Trace::InstRecord *traceData) const
+ {
+ panic("Tried to execute a macroop directly!\n");
+ }
+};
+
+/**
+ * Base class for all RISC-V Microops
+ */
+class RiscvMicroInst : public RiscvStaticInst
+{
+ protected:
+ // Constructor
+ RiscvMicroInst(const char *mnem, ExtMachInst _machInst,
+ OpClass __opClass) :
+ RiscvStaticInst(mnem, _machInst, __opClass)
+ {
+ flags[IsMicroop] = true;
+ }
+
+ void
+ advancePC(RiscvISA::PCState &pcState) const
+ {
+ if (flags[IsLastMicroop]) {
+ pcState.uEnd();
+ } else {
+ pcState.uAdvance();
+ }
+ }
+};
+
+}
+
+#endif // __ARCH_RISCV_STATIC_INST_HH__
// Gabe Black
// Steve Reinhardt
-// Declarations for execute() methods.
-def template BasicExecDeclare {{
- Fault execute(ExecContext *, Trace::InstRecord *) const;
-}};
-
-def template DoFpOpDeclare {{
- Fault doFpOp(ExecContext *, Trace::InstRecord *)
- const M5_NO_INLINE;
-}};
-
-// Definitions of execute methods that panic.
-def template BasicExecPanic {{
- Fault
- execute(ExecContext *, Trace::InstRecord *) const
- {
- panic("Execute method called when it shouldn't!");
- M5_DUMMY_RETURN
- }
-}};
-
// Basic instruction class declaration template.
def template BasicDeclare {{
/**
public:
// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
public:
// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(BasicExecDeclare)s
- %(DoFpOpDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault doFpOp(ExecContext *,
+ Trace::InstRecord *) const M5_NO_INLINE;
};
}};
public:
// Constructor.
%(class_name)s(const char * mnemonic, ExtMachInst machInst);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
/// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(BasicExecDeclare)s
-
- %(EACompDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault eaComp(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const;
};
}};
public:
// Constructor
%(class_name)s_0(ExtMachInst machInst);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const;
};
class %(class_name)s_1 : public %(base_class)sMicro
public:
// Constructor
%(class_name)s_1(ExtMachInst machInst);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const;
};
class %(class_name)s_2 : public %(base_class)sMicro
public:
// Constructor
%(class_name)s_2(ExtMachInst machInst);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const;
};
class %(class_name)s_3 : public %(base_class)sMicro
public:
// Constructor
%(class_name)s_3(ExtMachInst machInst);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const;
};
class %(class_name)s_4 : public %(base_class)sMicro
public:
// Constructor
%(class_name)s_4(ExtMachInst machInst);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const;
};
class %(class_name)s_5 : public %(base_class)sMicro
public:
// Constructor
%(class_name)s_5(ExtMachInst machInst);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const;
};
class %(class_name)s_6 : public %(base_class)sMicro
public:
// Constructor
%(class_name)s_6(ExtMachInst machInst);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const;
};
class %(class_name)s_7 : public %(base_class)sMicro
public:
// Constructor
%(class_name)s_7(ExtMachInst machInst);
- %(BasicExecDeclare)s
- %(InitiateAccDeclare)s
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *,
+ Trace::InstRecord *) const;
};
};
}};
}
}};
-def template EACompDeclare {{
- Fault eaComp(ExecContext *, Trace::InstRecord *) const;
-}};
-
-// This delcares the initiateAcc function in memory operations
-def template InitiateAccDeclare {{
- Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
-}};
-
// This declares the completeAcc function in memory operations
def template CompleteAccDeclare {{
Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
//
// Authors: Gabe Black
-// This delcares the initiateAcc function in memory operations
-def template MacroInitiateAcc {{
- Fault
- initiateAcc(ExecContext *, Trace::InstRecord *) const
- {
- panic("Tried to execute a macroop directly!\n");
- return NoFault;
- }
-}};
-
-def template MacroCompleteAcc {{
- Fault
- completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const
- {
- panic("Tried to execute a macroop directly!\n");
- return NoFault;
- }
-}};
-
-// This template provides the execute functions for a store
-def template MacroExecute {{
- Fault
- execute(ExecContext *, Trace::InstRecord *) const
- {
- panic("Tried to execute a macroop directly!\n");
- return NoFault;
- }
-}};
-
output header {{
class SparcMacroInst : public SparcStaticInst
return microops[upc];
}
- %(MacroExecute)s
- %(MacroInitiateAcc)s
- %(MacroCompleteAcc)s
+ Fault
+ execute(ExecContext *, Trace::InstRecord *) const
+ {
+ panic("Tried to execute a macroop directly!\n");
+ }
+
+ Fault
+ initiateAcc(ExecContext *, Trace::InstRecord *) const
+ {
+ panic("Tried to execute a macroop directly!\n");
+ }
+
+ Fault
+ completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const
+ {
+ panic("Tried to execute a macroop directly!\n");
+ }
};
class SparcMicroInst : public SparcStaticInst
// Per-cpu-model nop execute method.
def template NopExec {{
-
- Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const
- {
- // Nothing to see here, move along
- return NoFault;
- }
}};
output header {{
flags[IsNop] = true;
}
- // All Nop instructions do the same thing, so this can be
- // defined here. Nops can be defined directly, so there
- // needs to be a default implementation. Interpolate via
- // template so i gets expanded to a set of
- // cpu-model-specific functions.
- %(NopExec)s
+ Fault
+ execute(ExecContext *xc, Trace::InstRecord *traceData) const
+ {
+ return NoFault;
+ }
std::string generateDisassembly(Addr pc,
const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
{
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string generateDisassembly(Addr pc,
const SymbolTable *symtab) const;
//
// Authors: Gabe Black
-// Declarations for execute() methods.
-def template BasicExecDeclare {{
- Fault execute(ExecContext *, Trace::InstRecord *) const;
-}};
-
-// Definitions of execute methods that panic.
-def template BasicExecPanic {{
- Fault execute(ExecContext *, Trace::InstRecord *) const
- {
- panic("Execute method called when it shouldn't!");
- M5_DUMMY_RETURN
- }
-}};
-
// Basic instruction class declaration template.
def template BasicDeclare {{
/**
public:
// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
// Mwait instruction
-// Declarations for execute() methods.
-def template MwaitExecDeclare {{
- Fault execute(ExecContext *, Trace::InstRecord *) const;
- Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
- Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
-}};
-
def template MwaitDeclare {{
class %(class_name)s : public %(base_class)s
{
public:
// Constructor.
%(class_name)s(ExtMachInst machInst);
- %(MwaitExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
flags[IsNonSpeculative] = true;
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
{
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string generateDisassembly(Addr pc,
const SymbolTable *symtab) const;
uint32_t _numMicroops, X86ISA::EmulEnv _env)
: MacroopBase(mnem, _machInst, _numMicroops, _env)
{}
- %(MacroExecPanic)s
+
+ Fault
+ execute(ExecContext *, Trace::InstRecord *) const
+ {
+ panic("Tried to execute macroop directly!");
+ }
};
}};
%(class_name)s(ExtMachInst _machInst, const char * instMnem,
uint64_t setFlags, std::string _message, uint8_t _cc);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
uint8_t _dataSize, int8_t _spm);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
uint8_t _dataSize, uint8_t _addressSize,
Request::FlagsType _memFlags);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
}
}};
-// Common templates
-
-//This delcares the initiateAcc function in memory operations
-def template InitiateAccDeclare {{
- Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
-}};
-
-//This declares the completeAcc function in memory operations
-def template CompleteAccDeclare {{
- Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
-}};
-
def template MicroLdStOpDeclare {{
class %(class_name)s : public %(base_class)s
{
uint8_t _dataSize, uint8_t _addressSize,
Request::FlagsType _memFlags);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
uint8_t _dataSize, uint8_t _addressSize,
Request::FlagsType _memFlags);
- %(BasicExecDeclare)s
-
- %(InitiateAccDeclare)s
-
- %(CompleteAccDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+ Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
+ Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
};
}};
uint64_t setFlags, InstRegIndex _dest,
uint64_t _imm, uint8_t _dataSize);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
uint8_t _srcSize, uint8_t _destSize, uint16_t _ext);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
InstRegIndex _src1, uint16_t _imm8, InstRegIndex _dest,
uint8_t _srcSize, uint8_t _destSize, uint16_t _ext);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
uint8_t _dataSize, uint16_t _ext);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
InstRegIndex _src1, uint8_t _imm8, InstRegIndex _dest,
uint8_t _dataSize, uint16_t _ext);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
%(class_name)s(ExtMachInst _machInst, const char * instMnem,
uint64_t setFlags, uint16_t _target, uint8_t _cc);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
{
}
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
std::string generateDisassembly(Addr pc,
const SymbolTable *symtab) const;
%(class_name)s(ExtMachInst _machInst, const char * instMnem,
uint64_t setFlags, Fault _fault, uint8_t _cc);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
const char * instMnem,
uint64_t setFlags);
- %(BasicExecDeclare)s
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
};
}};
projects / gem5.git / commitdiff