middle-end/96453 - relax gimple_expand_vec_cond_expr

This relaxes the condition under which we also try NE_EXPR
for a fake generated compare in addition to LT_EXPR given
the fact the verification ICEd when it failed but obviously
was only implemented for constants.  Thus the patch removes
the verification and the restriction to constant operands.

2020-09-23  Richard Biener  <rguenther@suse.de>

	PR middle-end/96453
	* gimple-isel.cc (gimple_expand_vec_cond_expr): Remove
	LT_EXPR -> NE_EXPR verification and also apply it for
	non-constant masks.

	* gcc.dg/pr96453.c: New testcase.

diff --git a/gcc/gimple-isel.cc b/gcc/gimple-isel.cc
index b330cf4c20e2167bf13bf806bbe64ece59db19e4..97922632afd6b031c0f97a3afd57f0d665afba16 100644 (file)
--- a/gcc/gimple-isel.cc
+++ b/gcc/gimple-isel.cc
@@ -138,22 +138,11 @@ gimple_expand_vec_cond_expr (gimple_stmt_iterator *gsi,
   if (icode == CODE_FOR_nothing)
     {
       if (tcode == LT_EXPR
-         && op0a == op0
-         && TREE_CODE (op0) == VECTOR_CST)
+         && op0a == op0)
        {
          /* A VEC_COND_EXPR condition could be folded from EQ_EXPR/NE_EXPR
             into a constant when only get_vcond_eq_icode is supported.
-            Verify < 0 and != 0 behave the same and change it to NE_EXPR.  */
-         unsigned HOST_WIDE_INT nelts;
-         if (!VECTOR_CST_NELTS (op0).is_constant (&nelts))
-           {
-             if (VECTOR_CST_STEPPED_P (op0))
-               gcc_unreachable ();
-             nelts = vector_cst_encoded_nelts (op0);
-           }
-         for (unsigned int i = 0; i < nelts; ++i)
-           if (tree_int_cst_sgn (vector_cst_elt (op0, i)) == 1)
-             gcc_unreachable ();
+            Try changing it to NE_EXPR.  */
          tcode = NE_EXPR;
        }
       if (tcode == EQ_EXPR || tcode == NE_EXPR)

diff --git a/gcc/testsuite/gcc.dg/pr96453.c b/gcc/testsuite/gcc.dg/pr96453.c
new file mode 100644 (file)
index 0000000..f758e7e
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr96453.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-Og -fno-early-inlining -fno-tree-ccp -fno-tree-dce" } */
+/* { dg-additional-options "-mavx -mno-sse4.2" { target x86_64-*-* i?86-*-* } } */
+
+typedef int __attribute__ ((__vector_size__ (16))) U;
+typedef unsigned long __attribute__ ((__vector_size__ (16))) V;
+
+static inline int
+bar (unsigned long e, V f)
+{
+  V g = f != e;
+  (union {U b;}){(U) g};
+}
+
+void
+foo (void)
+{
+  int j = bar (8, (V) { });
+  for (unsigned i;; i[&j])
+    ;
+}