+2017-11-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/82990
+ * config/i386/i386.c (pass_insert_vzeroupper::gate): Remove
+ TARGET_AVX512ER check.
+ (ix86_option_override_internal): Set MASK_VZEROUPPER if
+ neither -mzeroupper nor -mno-zeroupper is used and
+ TARGET_EMIT_VZEROUPPER is set.
+ * config/i386/i386.h (TARGET_EMIT_VZEROUPPER): New.
+ * config/i386/x86-tune.def: Add X86_TUNE_EMIT_VZEROUPPER.
+
2017-11-15 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add support for
/* opt_pass methods: */
virtual bool gate (function *)
{
- return TARGET_AVX && !TARGET_AVX512ER
+ return TARGET_AVX
&& TARGET_VZEROUPPER && flag_expensive_optimizations
&& !optimize_size;
}
if (TARGET_SEH && TARGET_CALL_MS2SYSV_XLOGUES)
sorry ("-mcall-ms2sysv-xlogues isn%'t currently supported with SEH");
- if (!(opts_set->x_target_flags & MASK_VZEROUPPER))
+ if (!(opts_set->x_target_flags & MASK_VZEROUPPER)
+ && TARGET_EMIT_VZEROUPPER)
opts->x_target_flags |= MASK_VZEROUPPER;
if (!(opts_set->x_target_flags & MASK_STV))
opts->x_target_flags |= MASK_STV;
ix86_tune_features[X86_TUNE_AVOID_FALSE_DEP_FOR_BMI]
#define TARGET_ONE_IF_CONV_INSN \
ix86_tune_features[X86_TUNE_ONE_IF_CONV_INSN]
+#define TARGET_EMIT_VZEROUPPER \
+ ix86_tune_features[X86_TUNE_EMIT_VZEROUPPER]
/* Feature tests against the various architecture variations. */
enum ix86_arch_indices {
arithmetic to 32bit via PROMOTE_MODE macro. This code generation scheme
is usually used for RISC targets. */
DEF_TUNE (X86_TUNE_PROMOTE_QI_REGS, "promote_qi_regs", 0U)
+
+/* X86_TUNE_EMIT_VZEROUPPER: This enables vzeroupper instruction insertion
+ before a transfer of control flow out of the function. */
+DEF_TUNE (X86_TUNE_EMIT_VZEROUPPER, "emit_vzeroupper", ~m_KNL)
+2017-11-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/82990
+ * gcc.target/i386/pr82942-2.c: Add -mtune=knl.
+ * gcc.target/i386/pr82990-1.c: New test.
+ * gcc.target/i386/pr82990-2.c: Likewise.
+ * gcc.target/i386/pr82990-3.c: Likewise.
+ * gcc.target/i386/pr82990-4.c: Likewise.
+ * gcc.target/i386/pr82990-5.c: Likewise.
+ * gcc.target/i386/pr82990-6.c: Likewise.
+ * gcc.target/i386/pr82990-7.c: Likewise.
+
2017-11-15 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/builtins-3-p9.c: Add -O1, update
/* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512er -O2" } */
+/* { dg-options "-mavx512f -mavx512er -mtune=knl -O2" } */
#include "pr82941-1.c"
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=knl -mvzeroupper" } */
+
+#include <immintrin.h>
+
+extern __m512d y, z;
+
+void
+pr82941 ()
+{
+ z = y;
+}
+
+/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=skylake-avx512 -mno-vzeroupper" } */
+
+#include "pr82941-1.c"
+
+/* { dg-final { scan-assembler-not "vzeroupper" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -mavx512er -mvzeroupper -O2" } */
+
+#include "pr82941-1.c"
+
+/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -mno-avx512er -mno-vzeroupper -O2" } */
+
+#include "pr82941-1.c"
+
+/* { dg-final { scan-assembler-not "vzeroupper" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f -mtune=generic" } */
+
+#include <immintrin.h>
+
+extern __m512d y, z;
+
+void
+pr82941 ()
+{
+ z = y;
+}
+
+/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=skylake-avx512 -mtune=knl" } */
+
+#include "pr82941-1.c"
+
+/* { dg-final { scan-assembler-not "vzeroupper" } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=skylake-avx512 -mtune=generic -mtune-ctrl=^emit_vzeroupper" } */
+
+#include "pr82941-1.c"
+
+/* { dg-final { scan-assembler-not "vzeroupper" } } */