+2004-02-17 Petko Manolov <petkan@nucleusys.com>
+
+ * config/tc-arm.c (do_mav_dspsc_1): Correct offset of CRn.
+ (do_mav_dspsc_2): Likewise.
+ Fix accumulator registers move opcodes.
+
2004-02-13 Hannes Reinecke <hare@suse.de>
Jakub Jelinek <jakub@redhat.com>
Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
Modified by David Taylor (dtaylor@armltd.co.uk)
Cirrus coprocessor mods by Aldy Hernandez (aldyh@redhat.com)
+ Cirrus coprocessor fixes by Petko Manolov (petkan@nucleusys.com)
+ Cirrus coprocessor fixes by Vladimir Ivanov (vladitx@nucleusys.com)
This file is part of GAS, the GNU Assembler.
/* "INSN<cond> X,Y" where X:bit16, Y:bit12. */
#define MAV_MODE2 0x0c10
-/* "INSN<cond> X,Y" where X:0, Y:bit16. */
-#define MAV_MODE3 0x1000
+/* "INSN<cond> X,Y" where X:bit12, Y:bit16. */
+#define MAV_MODE3 0x100c
/* "INSN<cond> X,Y,Z" where X:16, Y:0, Z:12. */
#define MAV_MODE4 0x0c0010
{"cfmvr64l", 0xee100510, 8, ARM_CEXT_MAVERICK, do_mav_binops_1c},
{"cfmv64hr", 0xee000530, 8, ARM_CEXT_MAVERICK, do_mav_binops_2c},
{"cfmvr64h", 0xee100530, 8, ARM_CEXT_MAVERICK, do_mav_binops_1c},
- {"cfmval32", 0xee100610, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a},
- {"cfmv32al", 0xee000610, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b},
- {"cfmvam32", 0xee100630, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a},
- {"cfmv32am", 0xee000630, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b},
- {"cfmvah32", 0xee100650, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a},
- {"cfmv32ah", 0xee000650, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b},
- {"cfmva32", 0xee100670, 7, ARM_CEXT_MAVERICK, do_mav_binops_3a},
- {"cfmv32a", 0xee000670, 7, ARM_CEXT_MAVERICK, do_mav_binops_3b},
- {"cfmva64", 0xee100690, 7, ARM_CEXT_MAVERICK, do_mav_binops_3c},
- {"cfmv64a", 0xee000690, 7, ARM_CEXT_MAVERICK, do_mav_binops_3d},
- {"cfmvsc32", 0xee1006b0, 8, ARM_CEXT_MAVERICK, do_mav_dspsc_1},
- {"cfmv32sc", 0xee0006b0, 8, ARM_CEXT_MAVERICK, do_mav_dspsc_2},
+ {"cfmval32", 0xee200440, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a},
+ {"cfmv32al", 0xee100440, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b},
+ {"cfmvam32", 0xee200460, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a},
+ {"cfmv32am", 0xee100460, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b},
+ {"cfmvah32", 0xee200480, 8, ARM_CEXT_MAVERICK, do_mav_binops_3a},
+ {"cfmv32ah", 0xee100480, 8, ARM_CEXT_MAVERICK, do_mav_binops_3b},
+ {"cfmva32", 0xee2004a0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3a},
+ {"cfmv32a", 0xee1004a0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3b},
+ {"cfmva64", 0xee2004c0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3c},
+ {"cfmv64a", 0xee1004c0, 7, ARM_CEXT_MAVERICK, do_mav_binops_3d},
+ {"cfmvsc32", 0xee2004e0, 8, ARM_CEXT_MAVERICK, do_mav_dspsc_1},
+ {"cfmv32sc", 0xee1004e0, 8, ARM_CEXT_MAVERICK, do_mav_dspsc_2},
{"cfcpys", 0xee000400, 6, ARM_CEXT_MAVERICK, do_mav_binops_1d},
{"cfcpyd", 0xee000420, 6, ARM_CEXT_MAVERICK, do_mav_binops_1e},
{"cfcvtsd", 0xee000460, 7, ARM_CEXT_MAVERICK, do_mav_binops_1f},
REG_TYPE_MVFX);
}
-/* cfmvsc32<cond> DSPSC,MVFX[15:0]. */
+/* cfmvsc32<cond> DSPSC,MVDX[15:0]. */
static void
do_mav_dspsc_1 (str)
char * str;
/* cfmvsc32. */
if (mav_reg_required_here (&str, -1, REG_TYPE_DSPSC) == FAIL
|| skip_past_comma (&str) == FAIL
- || mav_reg_required_here (&str, 16, REG_TYPE_MVFX) == FAIL)
+ || mav_reg_required_here (&str, 12, REG_TYPE_MVDX) == FAIL)
{
if (!inst.error)
inst.error = BAD_ARGS;
end_of_line (str);
}
-/* cfmv32sc<cond> MVFX[15:0],DSPSC. */
+/* cfmv32sc<cond> MVDX[15:0],DSPSC. */
static void
do_mav_dspsc_2 (str)
char * str;
skip_whitespace (str);
/* cfmv32sc. */
- if (mav_reg_required_here (&str, 0, REG_TYPE_MVFX) == FAIL
+ if (mav_reg_required_here (&str, 12, REG_TYPE_MVDX) == FAIL
|| skip_past_comma (&str) == FAIL
|| mav_reg_required_here (&str, -1, REG_TYPE_DSPSC) == FAIL)
{
+2004-02-17 Petko Manolov <petkan@nucleusys.com>
+
+ * gas/arm/maverick.c: DSPSC to/from opcode fixes.
+ * gas/arm/maverick.d: Likewise.
+ * gas/arm/maverick.s: Likewise.
+
2004-02-09 Kaz Kojima <kkojima@rr.iij4u.or.jp>
* gas/sh/basic.exp: Don't do sh4a tests for sh5.
MVfxa (ah32, 32ah, 2);
MVfxa (a32, 32a, 3);
MVdxa (a64, 64a, 4);
-MCRC2 (mvsc32, 6, 0, 1, 5, dspsc, mvreg ("fx", 16));
-MCRC2 (mv32sc, 6, 0, 0, 5, mvreg ("fx", 0), dspsc);
+MCRC2 (mvsc32, 4, 1, 0, 7, dspsc, mvreg ("dx", 12));
+MCRC2 (mv32sc, 4, 0, 1, 7, mvreg ("dx", 12), dspsc);
CDP2 (cpys, , 4, 0, 0, "f", "f");
CDP2 (cpyd, , 4, 0, 1, "d", "d");
0*29c <move\+0xbc> 1e ?16 ?65 ?30 ? * cfmvr64hne r6, ?mvdx6
0*2a0 <move\+0xc0> be ?17 ?05 ?30 ? * cfmvr64hlt r0, ?mvdx7
0*2a4 <move\+0xc4> 5e ?13 ?75 ?30 ? * cfmvr64hpl r7, ?mvdx3
-0*2a8 <move\+0xc8> ce ?11 ?06 ?11 ? * cfmval32gt mvax1, ?mvfx1
-0*2ac <move\+0xcc> 8e ?1d ?06 ?13 ? * cfmval32hi mvax3, ?mvfx13
-0*2b0 <move\+0xd0> 6e ?14 ?06 ?13 ? * cfmval32vs mvax3, ?mvfx4
-0*2b4 <move\+0xd4> 2e ?10 ?06 ?11 ? * cfmval32cs mvax1, ?mvfx0
-0*2b8 <move\+0xd8> 5e ?1a ?06 ?13 ? * cfmval32pl mvax3, ?mvfx10
-0*2bc <move\+0xdc> 9e ?01 ?06 ?14 ? * cfmv32alls mvfx4, ?mvax1
-0*2c0 <move\+0xe0> 3e ?03 ?06 ?18 ? * cfmv32alcc mvfx8, ?mvax3
-0*2c4 <move\+0xe4> 7e ?03 ?06 ?12 ? * cfmv32alvc mvfx2, ?mvax3
-0*2c8 <move\+0xe8> ce ?01 ?06 ?16 ? * cfmv32algt mvfx6, ?mvax1
-0*2cc <move\+0xec> 0e ?03 ?06 ?17 ? * cfmv32aleq mvfx7, ?mvax3
-0*2d0 <move\+0xf0> ee ?1c ?06 ?32 ? * cfmvam32 mvax2, ?mvfx12
-0*2d4 <move\+0xf4> ae ?18 ?06 ?33 ? * cfmvam32ge mvax3, ?mvfx8
-0*2d8 <move\+0xf8> ee ?16 ?06 ?32 ? * cfmvam32 mvax2, ?mvfx6
-0*2dc <move\+0xfc> be ?12 ?06 ?32 ? * cfmvam32lt mvax2, ?mvfx2
-0*2e0 <move\+0x100> 9e ?15 ?06 ?30 ? * cfmvam32ls mvax0, ?mvfx5
-0*2e4 <move\+0x104> ee ?02 ?06 ?3a ? * cfmv32am mvfx10, ?mvax2
-0*2e8 <move\+0x108> 4e ?03 ?06 ?3e ? * cfmv32ammi mvfx14, ?mvax3
-0*2ec <move\+0x10c> 8e ?02 ?06 ?3d ? * cfmv32amhi mvfx13, ?mvax2
-0*2f0 <move\+0x110> 2e ?02 ?06 ?31 ? * cfmv32amcs mvfx1, ?mvax2
-0*2f4 <move\+0x114> 6e ?00 ?06 ?3b ? * cfmv32amvs mvfx11, ?mvax0
-0*2f8 <move\+0x118> 7e ?1e ?06 ?53 ? * cfmvah32vc mvax3, ?mvfx14
-0*2fc <move\+0x11c> 3e ?1a ?06 ?50 ? * cfmvah32cc mvax0, ?mvfx10
-0*300 <move\+0x120> 1e ?1f ?06 ?51 ? * cfmvah32ne mvax1, ?mvfx15
-0*304 <move\+0x124> de ?1b ?06 ?50 ? * cfmvah32le mvax0, ?mvfx11
-0*308 <move\+0x128> 4e ?19 ?06 ?50 ? * cfmvah32mi mvax0, ?mvfx9
-0*30c <move\+0x12c> 0e ?03 ?06 ?55 ? * cfmv32aheq mvfx5, ?mvax3
-0*310 <move\+0x130> ae ?00 ?06 ?59 ? * cfmv32ahge mvfx9, ?mvax0
-0*314 <move\+0x134> ee ?01 ?06 ?53 ? * cfmv32ah mvfx3, ?mvax1
-0*318 <move\+0x138> de ?00 ?06 ?57 ? * cfmv32ahle mvfx7, ?mvax0
-0*31c <move\+0x13c> 1e ?00 ?06 ?5c ? * cfmv32ahne mvfx12, ?mvax0
-0*320 <move\+0x140> be ?17 ?06 ?70 ? * cfmva32lt mvax0, ?mvfx7
-0*324 <move\+0x144> 5e ?13 ?06 ?72 ? * cfmva32pl mvax2, ?mvfx3
-0*328 <move\+0x148> ce ?11 ?06 ?71 ? * cfmva32gt mvax1, ?mvfx1
-0*32c <move\+0x14c> 8e ?1d ?06 ?73 ? * cfmva32hi mvax3, ?mvfx13
-0*330 <move\+0x150> 6e ?14 ?06 ?73 ? * cfmva32vs mvax3, ?mvfx4
-0*334 <move\+0x154> 2e ?00 ?06 ?79 ? * cfmv32acs mvfx9, ?mvax0
-0*338 <move\+0x158> 5e ?02 ?06 ?7f ? * cfmv32apl mvfx15, ?mvax2
-0*33c <move\+0x15c> 9e ?01 ?06 ?74 ? * cfmv32als mvfx4, ?mvax1
-0*340 <move\+0x160> 3e ?03 ?06 ?78 ? * cfmv32acc mvfx8, ?mvax3
-0*344 <move\+0x164> 7e ?03 ?06 ?72 ? * cfmv32avc mvfx2, ?mvax3
-0*348 <move\+0x168> ce ?1b ?06 ?90 ? * cfmva64gt mvax0, ?mvdx11
-0*34c <move\+0x16c> 0e ?15 ?06 ?91 ? * cfmva64eq mvax1, ?mvdx5
-0*350 <move\+0x170> ee ?1c ?06 ?92 ? * cfmva64 mvax2, ?mvdx12
-0*354 <move\+0x174> ae ?18 ?06 ?93 ? * cfmva64ge mvax3, ?mvdx8
-0*358 <move\+0x178> ee ?16 ?06 ?92 ? * cfmva64 mvax2, ?mvdx6
-0*35c <move\+0x17c> be ?00 ?06 ?94 ? * cfmv64alt mvdx4, ?mvax0
-0*360 <move\+0x180> 9e ?01 ?06 ?90 ? * cfmv64als mvdx0, ?mvax1
-0*364 <move\+0x184> ee ?02 ?06 ?9a ? * cfmv64a mvdx10, ?mvax2
-0*368 <move\+0x188> 4e ?03 ?06 ?9e ? * cfmv64ami mvdx14, ?mvax3
-0*36c <move\+0x18c> 8e ?02 ?06 ?9d ? * cfmv64ahi mvdx13, ?mvax2
-0*370 <move\+0x190> 2e ?1c ?06 ?b0 ? * cfmvsc32cs dspsc, ?mvfx12
-0*374 <move\+0x194> 6e ?10 ?06 ?b0 ? * cfmvsc32vs dspsc, ?mvfx0
-0*378 <move\+0x198> 7e ?1e ?06 ?b0 ? * cfmvsc32vc dspsc, ?mvfx14
-0*37c <move\+0x19c> 3e ?1a ?06 ?b0 ? * cfmvsc32cc dspsc, ?mvfx10
-0*380 <move\+0x1a0> 1e ?1f ?06 ?b0 ? * cfmvsc32ne dspsc, ?mvfx15
-0*384 <move\+0x1a4> de ?00 ?06 ?b6 ? * cfmv32scle mvfx6, ?dspsc
-0*388 <move\+0x1a8> 4e ?00 ?06 ?b2 ? * cfmv32scmi mvfx2, ?dspsc
-0*38c <move\+0x1ac> 0e ?00 ?06 ?b5 ? * cfmv32sceq mvfx5, ?dspsc
-0*390 <move\+0x1b0> ae ?00 ?06 ?b9 ? * cfmv32scge mvfx9, ?dspsc
-0*394 <move\+0x1b4> ee ?00 ?06 ?b3 ? * cfmv32sc mvfx3, ?dspsc
+0*2a8 <move\+0xc8> ce ?21 ?14 ?40 ? * cfmval32gt mvax1, ?mvfx1
+0*2ac <move\+0xcc> 8e ?2d ?34 ?40 ? * cfmval32hi mvax3, ?mvfx13
+0*2b0 <move\+0xd0> 6e ?24 ?34 ?40 ? * cfmval32vs mvax3, ?mvfx4
+0*2b4 <move\+0xd4> 2e ?20 ?14 ?40 ? * cfmval32cs mvax1, ?mvfx0
+0*2b8 <move\+0xd8> 5e ?2a ?34 ?40 ? * cfmval32pl mvax3, ?mvfx10
+0*2bc <move\+0xdc> 9e ?11 ?44 ?40 ? * cfmv32alls mvfx4, ?mvax1
+0*2c0 <move\+0xe0> 3e ?13 ?84 ?40 ? * cfmv32alcc mvfx8, ?mvax3
+0*2c4 <move\+0xe4> 7e ?13 ?24 ?40 ? * cfmv32alvc mvfx2, ?mvax3
+0*2c8 <move\+0xe8> ce ?11 ?64 ?40 ? * cfmv32algt mvfx6, ?mvax1
+0*2cc <move\+0xec> 0e ?13 ?74 ?40 ? * cfmv32aleq mvfx7, ?mvax3
+0*2d0 <move\+0xf0> ee ?2c ?24 ?60 ? * cfmvam32 mvax2, ?mvfx12
+0*2d4 <move\+0xf4> ae ?28 ?34 ?60 ? * cfmvam32ge mvax3, ?mvfx8
+0*2d8 <move\+0xf8> ee ?26 ?24 ?60 ? * cfmvam32 mvax2, ?mvfx6
+0*2dc <move\+0xfc> be ?22 ?24 ?60 ? * cfmvam32lt mvax2, ?mvfx2
+0*2e0 <move\+0x100> 9e ?25 ?04 ?60 ? * cfmvam32ls mvax0, ?mvfx5
+0*2e4 <move\+0x104> ee ?12 ?a4 ?60 ? * cfmv32am mvfx10, ?mvax2
+0*2e8 <move\+0x108> 4e ?13 ?e4 ?60 ? * cfmv32ammi mvfx14, ?mvax3
+0*2ec <move\+0x10c> 8e ?12 ?d4 ?60 ? * cfmv32amhi mvfx13, ?mvax2
+0*2f0 <move\+0x110> 2e ?12 ?14 ?60 ? * cfmv32amcs mvfx1, ?mvax2
+0*2f4 <move\+0x114> 6e ?10 ?b4 ?60 ? * cfmv32amvs mvfx11, ?mvax0
+0*2f8 <move\+0x118> 7e ?2e ?34 ?80 ? * cfmvah32vc mvax3, ?mvfx14
+0*2fc <move\+0x11c> 3e ?2a ?04 ?80 ? * cfmvah32cc mvax0, ?mvfx10
+0*300 <move\+0x120> 1e ?2f ?14 ?80 ? * cfmvah32ne mvax1, ?mvfx15
+0*304 <move\+0x124> de ?2b ?04 ?80 ? * cfmvah32le mvax0, ?mvfx11
+0*308 <move\+0x128> 4e ?29 ?04 ?80 ? * cfmvah32mi mvax0, ?mvfx9
+0*30c <move\+0x12c> 0e ?13 ?54 ?80 ? * cfmv32aheq mvfx5, ?mvax3
+0*310 <move\+0x130> ae ?10 ?94 ?80 ? * cfmv32ahge mvfx9, ?mvax0
+0*314 <move\+0x134> ee ?11 ?34 ?80 ? * cfmv32ah mvfx3, ?mvax1
+0*318 <move\+0x138> de ?10 ?74 ?80 ? * cfmv32ahle mvfx7, ?mvax0
+0*31c <move\+0x13c> 1e ?10 ?c4 ?80 ? * cfmv32ahne mvfx12, ?mvax0
+0*320 <move\+0x140> be ?27 ?04 ?a0 ? * cfmva32lt mvax0, ?mvfx7
+0*324 <move\+0x144> 5e ?23 ?24 ?a0 ? * cfmva32pl mvax2, ?mvfx3
+0*328 <move\+0x148> ce ?21 ?14 ?a0 ? * cfmva32gt mvax1, ?mvfx1
+0*32c <move\+0x14c> 8e ?2d ?34 ?a0 ? * cfmva32hi mvax3, ?mvfx13
+0*330 <move\+0x150> 6e ?24 ?34 ?a0 ? * cfmva32vs mvax3, ?mvfx4
+0*334 <move\+0x154> 2e ?10 ?94 ?a0 ? * cfmv32acs mvfx9, ?mvax0
+0*338 <move\+0x158> 5e ?12 ?f4 ?a0 ? * cfmv32apl mvfx15, ?mvax2
+0*33c <move\+0x15c> 9e ?11 ?44 ?a0 ? * cfmv32als mvfx4, ?mvax1
+0*340 <move\+0x160> 3e ?13 ?84 ?a0 ? * cfmv32acc mvfx8, ?mvax3
+0*344 <move\+0x164> 7e ?13 ?24 ?a0 ? * cfmv32avc mvfx2, ?mvax3
+0*348 <move\+0x168> ce ?2b ?04 ?c0 ? * cfmva64gt mvax0, ?mvdx11
+0*34c <move\+0x16c> 0e ?25 ?14 ?c0 ? * cfmva64eq mvax1, ?mvdx5
+0*350 <move\+0x170> ee ?2c ?24 ?c0 ? * cfmva64 mvax2, ?mvdx12
+0*354 <move\+0x174> ae ?28 ?34 ?c0 ? * cfmva64ge mvax3, ?mvdx8
+0*358 <move\+0x178> ee ?26 ?24 ?c0 ? * cfmva64 mvax2, ?mvdx6
+0*35c <move\+0x17c> be ?10 ?44 ?c0 ? * cfmv64alt mvdx4, ?mvax0
+0*360 <move\+0x180> 9e ?11 ?04 ?c0 ? * cfmv64als mvdx0, ?mvax1
+0*364 <move\+0x184> ee ?12 ?a4 ?c0 ? * cfmv64a mvdx10, ?mvax2
+0*368 <move\+0x188> 4e ?13 ?e4 ?c0 ? * cfmv64ami mvdx14, ?mvax3
+0*36c <move\+0x18c> 8e ?12 ?d4 ?c0 ? * cfmv64ahi mvdx13, ?mvax2
+0*370 <move\+0x190> 2e ?20 ?c4 ?e0 ? * cfmvsc32cs dspsc, ?mvdx12
+0*374 <move\+0x194> 6e ?20 ?04 ?e0 ? * cfmvsc32vs dspsc, ?mvdx0
+0*378 <move\+0x198> 7e ?20 ?e4 ?e0 ? * cfmvsc32vc dspsc, ?mvdx14
+0*37c <move\+0x19c> 3e ?20 ?a4 ?e0 ? * cfmvsc32cc dspsc, ?mvdx10
+0*380 <move\+0x1a0> 1e ?20 ?f4 ?e0 ? * cfmvsc32ne dspsc, ?mvdx15
+0*384 <move\+0x1a4> de ?10 ?64 ?e0 ? * cfmv32scle mvdx6, ?dspsc
+0*388 <move\+0x1a8> 4e ?10 ?24 ?e0 ? * cfmv32scmi mvdx2, ?dspsc
+0*38c <move\+0x1ac> 0e ?10 ?54 ?e0 ? * cfmv32sceq mvdx5, ?dspsc
+0*390 <move\+0x1b0> ae ?10 ?94 ?e0 ? * cfmv32scge mvdx9, ?dspsc
+0*394 <move\+0x1b4> ee ?10 ?34 ?e0 ? * cfmv32sc mvdx3, ?dspsc
0*398 <move\+0x1b8> de ?02 ?74 ?00 ? * cfcpysle mvf7, ?mvf2
0*39c <move\+0x1bc> 1e ?06 ?c4 ?00 ? * cfcpysne mvf12, ?mvf6
0*3a0 <move\+0x1c0> be ?07 ?04 ?00 ? * cfcpyslt mvf0, ?mvf7
cfmv64a mvdx10, mvax2
cfmv64ami mvdx14, mvax3
cfmv64ahi mvdx13, mvax2
- cfmvsc32cs dspsc, mvfx12
- cfmvsc32vs dspsc, mvfx0
- cfmvsc32vc dspsc, mvfx14
- cfmvsc32cc dspsc, mvfx10
- cfmvsc32ne dspsc, mvfx15
- cfmv32scle mvfx6, dspsc
- cfmv32scmi mvfx2, dspsc
- cfmv32sceq mvfx5, dspsc
- cfmv32scge mvfx9, dspsc
- cfmv32scal mvfx3, dspsc
+ cfmvsc32cs dspsc, mvdx12
+ cfmvsc32vs dspsc, mvdx0
+ cfmvsc32vc dspsc, mvdx14
+ cfmvsc32cc dspsc, mvdx10
+ cfmvsc32ne dspsc, mvdx15
+ cfmv32scle mvdx6, dspsc
+ cfmv32scmi mvdx2, dspsc
+ cfmv32sceq mvdx5, dspsc
+ cfmv32scge mvdx9, dspsc
+ cfmv32scal mvdx3, dspsc
cfcpysle mvf7, mvf2
cfcpysne mvf12, mvf6
cfcpyslt mvf0, mvf7
+2004-02-10 Petko Manolov <petkan@nucleusys.com>
+
+ * arm-opc.h Maverick accumulator register opcode fixes.
+
2004-02-13 Ben Elliston <bje@wasabisystems.com>
* m32r-dis.c: Regenerate.
{0x0e100510, 0x0ff00fff, "cfmvr64l%c\t%12-15r, mvdx%16-19d"},
{0x0e000530, 0x0ff00fff, "cfmv64hr%c\tmvdx%16-19d, %12-15r"},
{0x0e100530, 0x0ff00fff, "cfmvr64h%c\t%12-15r, mvdx%16-19d"},
- {0x0e100610, 0x0ff0fff0, "cfmval32%c\tmvax%0-3d, mvfx%16-19d"},
- {0x0e000610, 0x0ff0fff0, "cfmv32al%c\tmvfx%0-3d, mvax%16-19d"},
- {0x0e100630, 0x0ff0fff0, "cfmvam32%c\tmvax%0-3d, mvfx%16-19d"},
- {0x0e000630, 0x0ff0fff0, "cfmv32am%c\tmvfx%0-3d, mvax%16-19d"},
- {0x0e100650, 0x0ff0fff0, "cfmvah32%c\tmvax%0-3d, mvfx%16-19d"},
- {0x0e000650, 0x0ff0fff0, "cfmv32ah%c\tmvfx%0-3d, mvax%16-19d"},
- {0x0e000670, 0x0ff0fff0, "cfmv32a%c\tmvfx%0-3d, mvax%16-19d"},
- {0x0e100670, 0x0ff0fff0, "cfmva32%c\tmvax%0-3d, mvfx%16-19d"},
- {0x0e000690, 0x0ff0fff0, "cfmv64a%c\tmvdx%0-3d, mvax%16-19d"},
- {0x0e100690, 0x0ff0fff0, "cfmva64%c\tmvax%0-3d, mvdx%16-19d"},
- {0x0e1006b0, 0x0ff0fff0, "cfmvsc32%c\tdspsc, mvfx%16-19d"},
- {0x0e0006b0, 0x0ff0fff0, "cfmv32sc%c\tmvfx%0-3d, dspsc"},
+ {0x0e200440, 0x0ff00fff, "cfmval32%c\tmvax%12-15d, mvfx%16-19d"},
+ {0x0e100440, 0x0ff00fff, "cfmv32al%c\tmvfx%12-15d, mvax%16-19d"},
+ {0x0e200460, 0x0ff00fff, "cfmvam32%c\tmvax%12-15d, mvfx%16-19d"},
+ {0x0e100460, 0x0ff00fff, "cfmv32am%c\tmvfx%12-15d, mvax%16-19d"},
+ {0x0e200480, 0x0ff00fff, "cfmvah32%c\tmvax%12-15d, mvfx%16-19d"},
+ {0x0e100480, 0x0ff00fff, "cfmv32ah%c\tmvfx%12-15d, mvax%16-19d"},
+ {0x0e2004a0, 0x0ff00fff, "cfmva32%c\tmvax%12-15d, mvfx%16-19d"},
+ {0x0e1004a0, 0x0ff00fff, "cfmv32a%c\tmvfx%12-15d, mvax%16-19d"},
+ {0x0e2004c0, 0x0ff00fff, "cfmva64%c\tmvax%12-15d, mvdx%16-19d"},
+ {0x0e1004c0, 0x0ff00fff, "cfmv64a%c\tmvdx%12-15d, mvax%16-19d"},
+ {0x0e2004e0, 0x0fff0fff, "cfmvsc32%c\tdspsc, mvdx%12-15d"},
+ {0x0e1004e0, 0x0fff0fff, "cfmv32sc%c\tmvdx%12-15d, dspsc"},
{0x0e000400, 0x0ff00fff, "cfcpys%c\tmvf%12-15d, mvf%16-19d"},
{0x0e000420, 0x0ff00fff, "cfcpyd%c\tmvd%12-15d, mvd%16-19d"},
{0x0e000460, 0x0ff00fff, "cfcvtsd%c\tmvd%12-15d, mvf%16-19d"},
projects / binutils-gdb.git / commitdiff