mem-ruby: fix build with PROTOCOL=MOESI_hammer

Was failing with:

Error: Unrecognized variable: l1i_victim_addr

since: I2c43f22aba5af3a57e54b1c435e5d3fbba86d1d5

Change-Id: I7df666acb724ee541804dd7557753a9ba4005516
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20261
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Pouya Fotouhi <pfotouhi@ucdavis.edu>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/mem/protocol/MOESI_hammer-cache.sm b/src/mem/protocol/MOESI_hammer-cache.sm
index 4086f42a875d079942d9a6f0d505b67b853b8d58..66e1676d5ff7011e58367b0dff592e242c606e55 100644 (file)
--- a/src/mem/protocol/MOESI_hammer-cache.sm
+++ b/src/mem/protocol/MOESI_hammer-cache.sm
@@ -529,7 +529,7 @@ machine(MachineType:L1Cache, "AMD Hammer-like protocol")
               // No room in the L1, so we need to make room
               // Check if the line we want to evict is not locked
               Addr l1d_victim_addr := L1Dcache.cacheProbe(in_msg.LineAddress);
-              check_on_cache_probe(mandatoryQueue_in, l1i_victim_addr);
+              check_on_cache_probe(mandatoryQueue_in, l1d_victim_addr);
               if (L2cache.cacheAvail(l1d_victim_addr)) {
                 // The L2 has room, so we move the line from the L1 to the L2
                 trigger(Event:L1_to_L2,