radv: fix build
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 2 Oct 2019 18:37:43 +0000 (20:37 +0200)
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 2 Oct 2019 18:37:43 +0000 (20:37 +0200)
Forgot to amend the commit before updating the MR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
src/amd/vulkan/radv_pipeline.c

index 0d14ba2eda6f3162b698081ac6962534da6887a8..f8dd6178733c457bdef21fc5ece86bb047bc6c28 100644 (file)
@@ -3445,7 +3445,7 @@ radv_pipeline_generate_depth_stencil_state(struct radeon_cmdbuf *ctx_cs,
                              S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE);
 
        if (!pCreateInfo->pRasterizationState->depthClampEnable &&
-           ps->info.info.ps.writes_z) {
+           ps->info.ps.writes_z) {
                /* From VK_EXT_depth_range_unrestricted spec:
                 *
                 * "The behavior described in Primitive Clipping still applies.