add liteeth link
authorLuke Leighton <lkcl@lkcl.net>
Tue, 27 Feb 2018 01:07:09 +0000 (01:07 +0000)
committerLuke Leighton <lkcl@lkcl.net>
Tue, 27 Feb 2018 01:07:09 +0000 (01:07 +0000)
shakti/m_class/RGMII.mdwn

index a60ff71625f28cdaaa6147bb55cdbb5d2072e0fa..d50c9bf83b462a0e9ced074f5bcb3acbcef54899 100644 (file)
@@ -3,3 +3,4 @@
 * <http://bugs.libre-riscv.org/show_bug.cgi?id=9>
 * <https://github.com/alexforencich/verilog-ethernet/blob/master/rtl/eth_mac_1g_rgmii.v>
 * <https://github.com/pkerling/ethernet_mac> - doesn't do RGMII, does GMII.
+* <https://github.com/enjoy-digital/liteeth> - MII RMII GMII RGMII PHY