+2005-05-09 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (optimize_disp): Discard displacement entirely when zero and
+ not required by encoding constraints.
+
2005-05-09 H.J. Lu <hongjiu.lu@intel.com>
PR 936
disp &= (((offsetT) 2 << 31) - 1);
disp = (disp ^ ((offsetT) 1 << 31)) - ((addressT) 1 << 31);
}
- if (flag_code == CODE_64BIT)
+ if (!disp && (i.types[op] & BaseIndex))
+ {
+ i.types[op] &= ~Disp;
+ i.op[op].disps = 0;
+ i.disp_operands--;
+ }
+ else if (flag_code == CODE_64BIT)
{
if (fits_in_signed_long (disp))
i.types[op] |= Disp32S;
+2005-05-09 Jan Beulich <jbeulich@novell.com>
+
+ * gas/i386/tlsd.[sd]: Adjust to not assume zero displacement will
+ actually be present in memory addressing.
+ * gas/i386/tlspic.[sd]: Likewise.
+
2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
PR 940
[ ]+1f: R_386_TLS_LDM bar
23: e8 fc ff ff ff [ ]*call 24 <fn\+0x24>
[ ]+24: R_386_PLT32 ___tls_get_addr
- 28: 8d 7f 00 [ ]*lea 0x0\(%edi\),%edi
+ 28: 83 c7 00 [ ]*add \$0x0,%edi
2b: 8d 90 00 00 00 00 [ ]*lea 0x0\(%eax\),%edx
[ ]+2d: R_386_TLS_LDO_32 bar
- 31: 8d 76 00 [ ]*lea 0x0\(%esi\),%esi
+ 31: 83 c6 00 [ ]*add \$0x0,%esi
34: 8d 88 00 00 00 00 [ ]*lea 0x0\(%eax\),%ecx
[ ]+36: R_386_TLS_LDO_32 baz
3a: 8b 5d fc [ ]*mov 0xfffffffc\(%ebp\),%ebx
call ___tls_get_addr@PLT
/* Just show that there can be arbitrary instructions here */
- leal 0(%edi, 1), %edi
+ addl $0, %edi
leal bar@DTPOFF(%eax), %edx
/* %edx now contains &bar */
/* Again, arbitrary instructions */
- leal 0(%esi, 1), %esi
+ addl $0, %esi
leal baz@DTPOFF(%eax), %ecx
/* %ecx now contains &baz */
#objdump: -dr
-#name: i386 non-pic tls
+#name: i386 pic tls
.*: +file format .*
b: 81 c3 03 00 00 00 [ ]*add \$0x3,%ebx
[ ]+d: R_386_GOTPC _GLOBAL_OFFSET_TABLE_
11: 65 a1 00 00 00 00 [ ]*mov %gs:0x0,%eax
- 17: 8d 76 00 [ ]*lea 0x0\(%esi\),%esi
+ 17: 83 c6 00 [ ]*add \$0x0,%esi
1a: 2b 83 00 00 00 00 [ ]*sub 0x0\(%ebx\),%eax
[ ]+1c: R_386_TLS_IE_32 foo
20: 8b 83 00 00 00 00 [ ]*mov 0x0\(%ebx\),%eax
[ ]+22: R_386_TLS_GOTIE foo
- 26: 8d 76 00 [ ]*lea 0x0\(%esi\),%esi
+ 26: 83 c6 00 [ ]*add \$0x0,%esi
29: 65 8b 00 [ ]*mov %gs:\(%eax\),%eax
2c: 65 8b 0d 00 00 00 00 [ ]*mov %gs:0x0,%ecx
33: 03 8b 00 00 00 00 [ ]*add 0x0\(%ebx\),%ecx
movl %gs:0, %eax
/* Arbitrary instructions in between. */
- leal 0(%esi, 1), %esi
+ addl $0, %esi
subl foo@GOTTPOFF(%ebx), %eax
/* %eax now contains &foo */
movl foo@GOTNTPOFF(%ebx), %eax
/* Arbitrary instructions in between. */
- leal 0(%esi, 1), %esi
+ addl $0, %esi
movl %gs:(%eax), %eax
/* %eax now contains foo */