return stride == 1;
}
-bool
-fs_reg::is_zero() const
-{
- if (file != IMM)
- return false;
-
- return fixed_hw_reg.dw1.d == 0;
-}
-
-bool
-fs_reg::is_one() const
-{
- if (file != IMM)
- return false;
-
- return type == BRW_REGISTER_TYPE_F
- ? fixed_hw_reg.dw1.f == 1.0
- : fixed_hw_reg.dw1.d == 1;
-}
-
-bool
-fs_reg::is_null() const
-{
- return file == HW_REG &&
- fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
- fixed_hw_reg.nr == BRW_ARF_NULL;
-}
-
bool
fs_reg::is_valid_3src() const
{
return file == GRF || file == UNIFORM;
}
-bool
-fs_reg::is_accumulator() const
-{
- return file == HW_REG &&
- fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
- fixed_hw_reg.nr == BRW_ARF_ACCUMULATOR;
-}
-
int
fs_visitor::type_size(const struct glsl_type *type)
{
fs_reg(class fs_visitor *v, const struct glsl_type *type);
bool equals(const fs_reg &r) const;
- bool is_zero() const;
- bool is_one() const;
- bool is_null() const;
bool is_valid_3src() const;
bool is_contiguous() const;
- bool is_accumulator() const;
fs_reg &apply_stride(unsigned stride);
/** Smear a channel of the reg to all channels. */
{
}
+bool
+backend_reg::is_zero() const
+{
+ if (file != IMM)
+ return false;
+
+ return fixed_hw_reg.dw1.d == 0;
+}
+
+bool
+backend_reg::is_one() const
+{
+ if (file != IMM)
+ return false;
+
+ return type == BRW_REGISTER_TYPE_F
+ ? fixed_hw_reg.dw1.f == 1.0
+ : fixed_hw_reg.dw1.d == 1;
+}
+
+bool
+backend_reg::is_null() const
+{
+ return file == HW_REG &&
+ fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
+ fixed_hw_reg.nr == BRW_ARF_NULL;
+}
+
+
+bool
+backend_reg::is_accumulator() const
+{
+ return file == HW_REG &&
+ fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
+ fixed_hw_reg.nr == BRW_ARF_ACCUMULATOR;
+}
+
bool
backend_instruction::is_tex() const
{
struct backend_reg
{
+#ifdef __cplusplus
+ bool is_zero() const;
+ bool is_one() const;
+ bool is_null() const;
+ bool is_accumulator() const;
+#endif
+
enum register_file file; /**< Register file: GRF, MRF, IMM. */
uint8_t type; /**< Register type: BRW_REGISTER_TYPE_* */
swizzles[2], swizzles[3]);
}
-bool
-src_reg::is_accumulator() const
-{
- return file == HW_REG &&
- fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
- fixed_hw_reg.nr == BRW_ARF_ACCUMULATOR;
-}
-
-
void
dst_reg::init()
{
this->fixed_hw_reg = reg.fixed_hw_reg;
}
-bool
-dst_reg::is_null() const
-{
- return file == HW_REG &&
- fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
- fixed_hw_reg.nr == BRW_ARF_NULL;
-}
-
-bool
-dst_reg::is_accumulator() const
-{
- return file == HW_REG &&
- fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE &&
- fixed_hw_reg.nr == BRW_ARF_ACCUMULATOR;
-}
-
bool
vec4_instruction::is_send_from_grf()
{
}
}
-bool
-src_reg::is_zero() const
-{
- if (file != IMM)
- return false;
-
- return fixed_hw_reg.dw1.d == 0;
-}
-
-bool
-src_reg::is_one() const
-{
- if (file != IMM)
- return false;
-
- if (type == BRW_REGISTER_TYPE_F) {
- return fixed_hw_reg.dw1.f == 1.0;
- } else {
- return fixed_hw_reg.dw1.d == 1;
- }
-}
-
/**
* Does algebraic optimizations (0 * a = 0, 1 * a = a, a + 0 = a).
*
src_reg(struct brw_reg reg);
bool equals(const src_reg &r) const;
- bool is_zero() const;
- bool is_one() const;
- bool is_accumulator() const;
src_reg(class vec4_visitor *v, const struct glsl_type *type);
explicit dst_reg(src_reg reg);
- bool is_null() const;
- bool is_accumulator() const;
-
int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
src_reg *reladdr;