i965: Add low-level support for indirect sends
authorChris Forbes <chrisf@ijw.co.nz>
Sat, 2 Aug 2014 23:44:25 +0000 (11:44 +1200)
committerChris Forbes <chrisf@ijw.co.nz>
Fri, 15 Aug 2014 06:53:47 +0000 (18:53 +1200)
This provides a reasonable place to enforce the hardware restriction
that indirect descriptors must be in a0.0

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
src/mesa/drivers/dri/i965/brw_eu.h
src/mesa/drivers/dri/i965/brw_eu_emit.c

index 93f03454a27e81f9fb01ed1759fc2c0aafb896d5..5122e6336aa8d429e04c5025a4e476db43135283 100644 (file)
@@ -205,6 +205,11 @@ void brw_set_sampler_message(struct brw_compile *p,
                              unsigned simd_mode,
                              unsigned return_format);
 
+void brw_set_indirect_send_descriptor(struct brw_compile *p,
+                                      brw_inst *insn,
+                                      unsigned sfid,
+                                      struct brw_reg descriptor);
+
 void brw_set_dp_read_message(struct brw_compile *p,
                             brw_inst *insn,
                             unsigned binding_table_index,
index 65c06eccabd44c8ba3b33348a60188490cd95246..c2a408329981554988f72cf9044ac999b29ff047 100644 (file)
@@ -760,6 +760,21 @@ brw_set_sampler_message(struct brw_compile *p,
    }
 }
 
+void brw_set_indirect_send_descriptor(struct brw_compile *p,
+                                      brw_inst *insn,
+                                      unsigned sfid,
+                                      struct brw_reg descriptor)
+{
+   /* Only a0.0 may be used as SEND's descriptor operand. */
+   assert(descriptor.file == BRW_ARCHITECTURE_REGISTER_FILE);
+   assert(descriptor.type == BRW_REGISTER_TYPE_UD);
+   assert(descriptor.nr == BRW_ARF_ADDRESS);
+   assert(descriptor.subnr == 0);
+
+   brw_set_message_descriptor(p, insn, sfid, 0, 0, false, false);
+   brw_set_src1(p, insn, descriptor);
+}
+
 static void
 gen7_set_dp_scratch_message(struct brw_compile *p,
                             brw_inst *inst,