arch-arm: Perform stage 2 lookups using the EL2 state

Change-Id: Ic56b694f22a26e9c208a10e5703d4b5b0900070f
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10507
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>

diff --git a/src/arch/arm/stage2_lookup.cc b/src/arch/arm/stage2_lookup.cc
index 00c515df5d045a1dae050a5d636059033600b747..7e78a31939d2b993a0e1d9aca38f3678af715907 100644 (file)
--- a/src/arch/arm/stage2_lookup.cc
+++ b/src/arch/arm/stage2_lookup.cc
@@ -66,7 +66,7 @@ Stage2LookUp::getTe(ThreadContext *tc, TlbEntry *destTe)
         // checking. So call translate on stage 2 to do the checking. As the
         // entry is now in the TLB this should always hit the cache.
         if (fault == NoFault) {
-            if (inAArch64(tc))
+            if (ELIs64(tc, EL2))
                 fault = stage2Tlb->checkPermissions64(stage2Te, &req, mode, tc);
             else
                 fault = stage2Tlb->checkPermissions(stage2Te, &req, mode);