Power ISA currently requires a large
number of instructions to get Floating Point constants into registers.
`fmvis` on its own is equivalent to BF16 to FP32/64 conversion,
-but if followed up by `fishmv` an additional 16 bits of accuracy in the
+but if followed up by `frlsi` an additional 16 bits of accuracy in the
mantissa may be achieved.
*IBM may consider it worthwhile to extend these two instructions to
-v3.1 Prefixed (`pfmvis` and `pfishmv`). If so it is recommended that
-`pfmvis` load a full FP32 immediate and `pfishmv` extend the lower
+v3.1 Prefixed (`pfmvis` and `pfrlsi`). If so it is recommended that
+`pfmvis` load a full FP32 immediate and `pfrlsi` extend the lower
32-bits to construct a full FP64 immediate.*
## Load BF16 Immediate
fp32 = bf16 || [0]*16
FRS = Single_to_Double(fp32)
-## Float Immediate, Second Half <a name="fishmv"></a>
+## Float Replace Lower-Half Single, Immediate <a name="frlsi"></a>
-`fishmv FRS, D`
+`frlsi FRS, D`
DX-Form:
lower 16-bits.
The key difference between using `li` and `oris` to construct 32-bit
-GPR Immediates and `fishmv` is that the `fmvis` will have converted
+GPR Immediates and `frlsi` is that the `fmvis` will have converted
the `BF16` to FP64 (Double) format. This is taken into consideration
as can be seen in the pseudocode below
# first the upper bits, happens to be +1.0
fmvis f4, 0x3F80 # writes +1.0 to f4
# now write the lower 16 bits of an FP32
-fishmv f4, 0x8000 # writes +1.00390625 to f4
+frlsi f4, 0x8000 # writes +1.00390625 to f4
```
# Moves