i386: Set priority to P_AES for Westmere
authorH.J. Lu <hongjiu.lu@intel.com>
Mon, 7 Aug 2017 11:47:22 +0000 (11:47 +0000)
committerH.J. Lu <hjl@gcc.gnu.org>
Mon, 7 Aug 2017 11:47:22 +0000 (04:47 -0700)
The difference between Nehalem and Westmere is AES.  We should set
priority to P_AES for Westmere, not P_PROC_SSE4_2 which is for Nehalem.
Otherwise, we will pick Nehalem implementation on Westmere.  Tested on
Westmere.

PR target/81743
* config/i386/i386.c (get_builtin_code_for_version): Set priority
to P_AES for Westmere.

From-SVN: r250915

gcc/ChangeLog
gcc/config/i386/i386.c

index 440f6dac03b0bd065dc2d4e103cb09131aaa2f72..a78b1a742f4a00e6e91586e8aa12f5aca124439c 100644 (file)
@@ -1,3 +1,9 @@
+2017-08-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/81743
+       * config/i386/i386.c (get_builtin_code_for_version): Set priority
+       to P_AES for Westmere.
+
 2017-08-07  Jonathan Yong  <10walls@gmail.com>
 
        * config/i386/mingw.opt (fset-stack-executable): Removed.
index a5984659eb2d79d2cac9236ebc6426e26114a26f..c0b6015991d2781eb9741e16fe3f804d620735fb 100644 (file)
@@ -33417,13 +33417,18 @@ get_builtin_code_for_version (tree decl, tree *predicate_list)
              break;
            case PROCESSOR_NEHALEM:
              if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_AES)
-               arg_str = "westmere";
+               {
+                 arg_str = "westmere";
+                 priority = P_AES;
+               }
              else
-               /* We translate "arch=corei7" and "arch=nehalem" to
-                  "corei7" so that it will be mapped to M_INTEL_COREI7
-                  as cpu type to cover all M_INTEL_COREI7_XXXs.  */
-               arg_str = "corei7";
-             priority = P_PROC_SSE4_2;
+               {
+                 /* We translate "arch=corei7" and "arch=nehalem" to
+                    "corei7" so that it will be mapped to M_INTEL_COREI7
+                    as cpu type to cover all M_INTEL_COREI7_XXXs.  */
+                 arg_str = "corei7";
+                 priority = P_PROC_SSE4_2;
+               }
              break;
            case PROCESSOR_SANDYBRIDGE:
              if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_F16C)