i965/gen6+: Add load register immediate helper functions

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index ba42aa95b09edddca679c71c0f2e6789f6f96476..6625f9dee70e326586dc2060b7839175e9eb840f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1452,6 +1452,10 @@ void brw_store_register_mem32(struct brw_context *brw,
                               drm_intel_bo *bo, uint32_t reg, uint32_t offset);
 void brw_store_register_mem64(struct brw_context *brw,
                               drm_intel_bo *bo, uint32_t reg, uint32_t offset);
+void brw_load_register_imm32(struct brw_context *brw,
+                             uint32_t reg, uint32_t imm);
+void brw_load_register_imm64(struct brw_context *brw,
+                             uint32_t reg, uint64_t imm);
 void brw_load_register_reg(struct brw_context *brw, uint32_t src,
                            uint32_t dest);
 void brw_store_data_imm32(struct brw_context *brw, drm_intel_bo *bo,

diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 33927af2a6a0db3ff68eeb8454896281afdb6b72..98b94854c2792c9497cd0b10742f265e5a28dcaa 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -601,6 +601,38 @@ brw_store_register_mem64(struct brw_context *brw,
    }
 }
 
+/*
+ * Write a 32-bit register using immediate data.
+ */
+void
+brw_load_register_imm32(struct brw_context *brw, uint32_t reg, uint32_t imm)
+{
+   assert(brw->gen >= 6);
+
+   BEGIN_BATCH(3);
+   OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
+   OUT_BATCH(reg);
+   OUT_BATCH(imm);
+   ADVANCE_BATCH();
+}
+
+/*
+ * Write a 64-bit register using immediate data.
+ */
+void
+brw_load_register_imm64(struct brw_context *brw, uint32_t reg, uint64_t imm)
+{
+   assert(brw->gen >= 6);
+
+   BEGIN_BATCH(5);
+   OUT_BATCH(MI_LOAD_REGISTER_IMM | (5 - 2));
+   OUT_BATCH(reg);
+   OUT_BATCH(imm & 0xffffffff);
+   OUT_BATCH(reg + 4);
+   OUT_BATCH(imm >> 32);
+   ADVANCE_BATCH();
+}
+
 /*
  * Copies a 32-bit register.
  */