}
/* _NEW_BUFFERS | _NEW_COLOR */
- const bool active_fs_has_side_effects =
- _mesa_active_fragment_shader_has_side_effects(&brw->ctx);
if (brw_color_buffer_write_enabled(brw) || writes_depth ||
- active_fs_has_side_effects || dw1 & GEN7_WM_KILL_ENABLE) {
+ prog_data->has_side_effects || dw1 & GEN7_WM_KILL_ENABLE) {
dw1 |= GEN7_WM_DISPATCH_ENABLE;
}
if (multisampled_fbo) {
/* BRW_NEW_FS_PROG_DATA */
if (prog_data->early_fragment_tests)
dw1 |= GEN7_WM_EARLY_DS_CONTROL_PREPS;
- else if (active_fs_has_side_effects)
+ else if (prog_data->has_side_effects)
dw1 |= GEN7_WM_EARLY_DS_CONTROL_PSEXEC;
/* The "UAV access enable" bits are unnecessary on HSW because they only
*/
if (brw->is_haswell &&
!(brw_color_buffer_write_enabled(brw) || writes_depth) &&
- active_fs_has_side_effects)
+ prog_data->has_side_effects)
dw2 |= HSW_WM_UAV_ONLY;
BEGIN_BATCH(3);
gen8_upload_ps_extra(struct brw_context *brw,
const struct brw_wm_prog_data *prog_data)
{
- struct gl_context *ctx = &brw->ctx;
uint32_t dw1 = 0;
dw1 |= GEN8_PSX_PIXEL_SHADER_VALID;
*
* BRW_NEW_FS_PROG_DATA | BRW_NEW_FRAGMENT_PROGRAM | _NEW_BUFFERS | _NEW_COLOR
*/
- if ((_mesa_active_fragment_shader_has_side_effects(ctx) ||
- prog_data->uses_kill) && !brw_color_buffer_write_enabled(brw))
+ if ((prog_data->has_side_effects || prog_data->uses_kill) &&
+ !brw_color_buffer_write_enabled(brw))
dw1 |= GEN8_PSX_SHADER_HAS_UAV;
if (prog_data->computed_stencil) {
/* BRW_NEW_FS_PROG_DATA */
if (brw->wm.prog_data->early_fragment_tests)
dw1 |= GEN7_WM_EARLY_DS_CONTROL_PREPS;
- else if (_mesa_active_fragment_shader_has_side_effects(&brw->ctx))
+ else if (brw->wm.prog_data->has_side_effects)
dw1 |= GEN7_WM_EARLY_DS_CONTROL_PSEXEC;
BEGIN_BATCH(2);