;; Even though we only accept memory inputs, the backend _really_
;; wants to be able to do this between registers.
-(define_insn "floathisf2"
+(define_expand "floathisf2"
+ [(set (match_operand:SF 0 "register_operand" "")
+ (float:SF (match_operand:HI 1 "nonimmediate_operand" "")))]
+ "TARGET_SSE || TARGET_80387"
+{
+ if (TARGET_SSE && TARGET_SSE_MATH)
+ {
+ emit_insn (gen_floatsisf2 (operands[0],
+ convert_to_mode (SImode, operands[1], 0)));
+ DONE;
+ }
+})
+
+(define_insn "*floathisf2_1"
[(set (match_operand:SF 0 "register_operand" "=f,f")
(float:SF (match_operand:HI 1 "nonimmediate_operand" "m,r")))]
- "TARGET_80387 && !TARGET_SSE"
+ "TARGET_80387 && (!TARGET_SSE || !TARGET_SSE_MATH)"
"@
fild%z1\t%1
#"
DONE;
})
-(define_insn "floathidf2"
+(define_expand "floathidf2"
+ [(set (match_operand:DF 0 "register_operand" "")
+ (float:DF (match_operand:HI 1 "nonimmediate_operand" "")))]
+ "TARGET_SSE2 || TARGET_80387"
+{
+ if (TARGET_SSE && TARGET_SSE_MATH)
+ {
+ emit_insn (gen_floatsidf2 (operands[0],
+ convert_to_mode (SImode, operands[1], 0)));
+ DONE;
+ }
+})
+
+(define_insn "*floathidf2_1"
[(set (match_operand:DF 0 "register_operand" "=f,f")
(float:DF (match_operand:HI 1 "nonimmediate_operand" "m,r")))]
- "TARGET_80387 && !TARGET_SSE2"
+ "TARGET_80387 && (!TARGET_SSE2 || !TARGET_SSE_MATH)"
"@
fild%z1\t%1
#"