AC_TM_FORCE_ENABLE_XNACK = (1 << 2),
AC_TM_FORCE_DISABLE_XNACK = (1 << 3),
AC_TM_PROMOTE_ALLOCA_TO_SCRATCH = (1 << 4),
+ AC_TM_CHECK_IR = (1 << 5),
};
enum ac_float_mode {
tm_options |= AC_TM_SUPPORTS_SPILL;
if (device->instance->perftest_flags & RADV_PERFTEST_SISCHED)
tm_options |= AC_TM_SISCHED;
+ if (options->check_ir)
+ tm_options |= AC_TM_CHECK_IR;
radv_init_llvm_once();
tm = ac_create_target_machine(chip_family, tm_options, NULL);
- passmgr = ac_create_passmgr(NULL, options->check_ir);
+ passmgr = ac_create_passmgr(NULL, tm_options & AC_TM_CHECK_IR);
if (gs_copy_shader) {
assert(shader_count == 1);
radv_compile_gs_copy_shader(tm, passmgr, *shaders, &binary,
(sscreen->debug_flags & DBG(SI_SCHED) ? AC_TM_SISCHED : 0) |
(sscreen->info.chip_class >= GFX9 ? AC_TM_FORCE_ENABLE_XNACK : 0) |
(sscreen->info.chip_class < GFX9 ? AC_TM_FORCE_DISABLE_XNACK : 0) |
- (!sscreen->llvm_has_working_vgpr_indexing ? AC_TM_PROMOTE_ALLOCA_TO_SCRATCH : 0);
+ (!sscreen->llvm_has_working_vgpr_indexing ? AC_TM_PROMOTE_ALLOCA_TO_SCRATCH : 0) |
+ (sscreen->debug_flags & DBG(CHECK_IR) ? AC_TM_CHECK_IR : 0);
const char *triple;
ac_init_llvm_once();
return;
compiler->passmgr = ac_create_passmgr(compiler->target_library_info,
- (sscreen->debug_flags & DBG(CHECK_IR)));
+ tm_options & AC_TM_CHECK_IR);
if (!compiler->passmgr)
return;
}