[ARM/AArch64] Add Falkor CPU support.
authorSiddhesh Poyarekar <siddhesh.poyarekar@linaro.org>
Thu, 10 Nov 2016 10:24:53 +0000 (10:24 +0000)
committerRichard Earnshaw <rearnsha@gcc.gnu.org>
Thu, 10 Nov 2016 10:24:53 +0000 (10:24 +0000)
2016-11-10  Siddhesh Poyarekar  <siddhesh.poyarekar@linaro.org>

* config/aarch64/aarch64-cores.def (qdf24xx): Update part
number.
(falkor): New core.
* config/aarch64/aarch64-tune.md: Regenerated.
* config/arm/arm-cores.def (falkor): New core.
* config/arm/arm-tables.opt: Regenerated.
* config/arm/arm-tune.md: Regenerated.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add falkor support.
* config/arm/t-aprofile (MULTILIB_MATCHES): Likewise.
* doc/invoke.texi (AArch64 Options/-mtune): Document it.
(ARM Options/-mtune): Likewise.

From-SVN: r242033

gcc/ChangeLog
gcc/config/aarch64/aarch64-cores.def
gcc/config/aarch64/aarch64-tune.md
gcc/config/arm/arm-cores.def
gcc/config/arm/arm-tables.opt
gcc/config/arm/arm-tune.md
gcc/config/arm/bpabi.h
gcc/config/arm/t-aprofile
gcc/doc/invoke.texi

index 2e3819eac6e86f77420a9e6b32bd3e623192be3b..fa964594323e74621d63415998c5f5d9b73a6ae5 100644 (file)
@@ -1,3 +1,17 @@
+2016-11-10  Siddhesh Poyarekar  <siddhesh.poyarekar@linaro.org>
+
+       * config/aarch64/aarch64-cores.def (qdf24xx): Update part
+       number.
+       (falkor): New core.
+       * config/aarch64/aarch64-tune.md: Regenerated.
+       * config/arm/arm-cores.def (falkor): New core.
+       * config/arm/arm-tables.opt: Regenerated.
+       * config/arm/arm-tune.md: Regenerated.
+       * config/arm/bpabi.h (BE8_LINK_SPEC): Add falkor support.
+       * config/arm/t-aprofile (MULTILIB_MATCHES): Likewise.
+       * doc/invoke.texi (AArch64 Options/-mtune): Document it.
+       (ARM Options/-mtune): Likewise.
+
 2016-11-10  Kugan Vivekanandarajah  <kuganv@linaro.org>
 
        Revert
index f9b75524fcf87d39ce2f3b77837ba47e458a4239..4b00f3f2d1bd7b15884f0a5e36eeff9de2187b81 100644 (file)
@@ -54,7 +54,8 @@ AARCH64_CORE("cortex-a73",  cortexa73, cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AA
 AARCH64_CORE("exynos-m1",   exynosm1,  exynosm1,  8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, exynosm1,  0x53, 0x001)
 
 /* Qualcomm ('Q') cores. */
-AARCH64_CORE("qdf24xx",     qdf24xx,   cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, qdf24xx,   0x51, 0x800)
+AARCH64_CORE("falkor",      falkor,    cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, qdf24xx,   0x51, 0xC00)
+AARCH64_CORE("qdf24xx",     qdf24xx,   cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, qdf24xx,   0x51, 0xC00)
 
 /* Cavium ('C') cores. */
 AARCH64_CORE("thunderx",    thunderx,  thunderx,  8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx,  0x43, 0x0a1)
index 022b13163b4f600cfc8463762e2d12a2f9f1fe78..29afcdf78d45ff828b9343e234ac6bc625821293 100644 (file)
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from aarch64-cores.def
 (define_attr "tune"
-       "cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,exynosm1,qdf24xx,thunderx,xgene1,vulcan,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53"
+       "cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,exynosm1,falkor,qdf24xx,thunderx,xgene1,vulcan,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53"
        (const (symbol_ref "((enum attr_tune) aarch64_tune)")))
index ec63ee4abe54af06cd5531486f294f9a8dae71a1..3f77c718da7eb314705720428650d48062063e9b 100644 (file)
@@ -175,6 +175,7 @@ ARM_CORE("cortex-a57",      cortexa57, cortexa57,   8A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED
 ARM_CORE("cortex-a72", cortexa72, cortexa57,   8A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
 ARM_CORE("cortex-a73", cortexa73, cortexa57,   8A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a73)
 ARM_CORE("exynos-m1",  exynosm1,  exynosm1,    8A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), exynosm1)
+ARM_CORE("falkor",     falkor,    cortexa57,   8A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), qdf24xx)
 ARM_CORE("qdf24xx",    qdf24xx,   cortexa57,   8A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), qdf24xx)
 ARM_CORE("xgene1",      xgene1,    xgene1,      8A,    ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH8A),            xgene1)
 
index f7886b94be779fcba91506e77574662fe7188876..d63585d085e967e4e812018e45e69e351d35da2d 100644 (file)
@@ -333,6 +333,9 @@ Enum(processor_type) String(cortex-a73) Value(cortexa73)
 EnumValue
 Enum(processor_type) String(exynos-m1) Value(exynosm1)
 
+EnumValue
+Enum(processor_type) String(falkor) Value(falkor)
+
 EnumValue
 Enum(processor_type) String(qdf24xx) Value(qdf24xx)
 
index e782baccf424e51ac19ef5f02d25ed4f4eb0541d..42a6d7a752789afe6f364084997a1d95526d6fc6 100644 (file)
@@ -35,7 +35,7 @@
        cortexa17cortexa7,cortexm23,cortexa32,
        cortexm33,cortexa35,cortexa53,
        cortexa57,cortexa72,cortexa73,
-       exynosm1,qdf24xx,xgene1,
-       cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,
-       cortexa73cortexa53"
+       exynosm1,falkor,qdf24xx,
+       xgene1,cortexa57cortexa53,cortexa72cortexa53,
+       cortexa73cortexa35,cortexa73cortexa53"
        (const (symbol_ref "((enum attr_tune) arm_tune)")))
index d45a1ca421901da25e16d965a9474438ea10f349..a75051c5607bfb53931447b69aa8712d7877201d 100644 (file)
@@ -79,6 +79,7 @@
    |mcpu=cortex-a73.cortex-a35                         \
    |mcpu=cortex-a73.cortex-a53                         \
    |mcpu=exynos-m1                                      \
+   |mcpu=falkor                                                \
    |mcpu=qdf24xx                                       \
    |mcpu=xgene1                                         \
    |mcpu=cortex-m1.small-multiply                       \
    |mcpu=cortex-a73.cortex-a35                         \
    |mcpu=cortex-a73.cortex-a53                         \
    |mcpu=exynos-m1                                      \
+   |mcpu=falkor                                                \
    |mcpu=qdf24xx                                       \
    |mcpu=xgene1                                         \
    |mcpu=cortex-m1.small-multiply                       \
index f852ecd04010ed54917c74e699a4580096b38e7f..8b591badf6037e37813ac98dffb2171e3be9b910 100644 (file)
@@ -92,6 +92,7 @@ MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a73
 MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a73.cortex-a35
 MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a73.cortex-a53
 MULTILIB_MATCHES       += march?armv8-a=mcpu?exynos-m1
+MULTILIB_MATCHES       += march?armv8-a=mcpu?falkor
 MULTILIB_MATCHES       += march?armv8-a=mcpu?qdf24xx
 MULTILIB_MATCHES       += march?armv8-a=mcpu?xgene1
 
index 76b854081bbf91850a96026f91e709ff537f2ac9..f133b3a4b9b441d4313e05bacafb769c0c2e258f 100644 (file)
@@ -13878,10 +13878,10 @@ processors implementing the target architecture.
 Specify the name of the target processor for which GCC should tune the
 performance of the code.  Permissible values for this option are:
 @samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57},
-@samp{cortex-a72}, @samp{cortex-a73}, @samp{exynos-m1}, @samp{qdf24xx},
-@samp{thunderx}, @samp{xgene1}, @samp{vulcan}, @samp{cortex-a57.cortex-a53},
-@samp{cortex-a72.cortex-a53}, @samp{cortex-a73.cortex-a35},
-@samp{cortex-a73.cortex-a53}, @samp{native}.
+@samp{cortex-a72}, @samp{cortex-a73}, @samp{exynos-m1}, @samp{falkor},
+@samp{qdf24xx}, @samp{thunderx}, @samp{xgene1}, @samp{vulcan},
+@samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
+@samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53}, @samp{native}.
 
 The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
 @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53}
@@ -14970,6 +14970,7 @@ Permissible names are: @samp{arm2}, @samp{arm250},
 @samp{cortex-m0.small-multiply},
 @samp{cortex-m0plus.small-multiply},
 @samp{exynos-m1},
+@samp{falkor},
 @samp{qdf24xx},
 @samp{marvell-pj4},
 @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312},