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diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 668d17467bae97991115e8dd8430a7035cea7b31..94b46176989eec758b3ad54bc43f9f09b540a21c 100644 (file)
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -264,6 +264,8 @@ elwidth, because these ops are pure explicit CR based.
 
 Examples: mfxm may take the extra bits and use them as extra mask bits.
 
+Example: hypothetically, operations could be modified to be considered 2-bit or 1-bit per CR.  This would need a very comprehensive review.
+
 # SUBVL Encoding
 
 the default for SUBVL is 1 and its encoding is 0b00 to indicate that