radv: set writes_memory for global memory stores/atomics

Fixes: 13ab63bb62b ('radv: Implement VK_EXT_buffer_device_address.')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index 60e0cd22fb0c24cc685219545b16d58edc3b4807..5384d1a0d17d826902467028598adbcb11fd37cd 100644 (file)
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -151,6 +151,15 @@ set_output_usage_mask(const nir_shader *nir, const nir_intrinsic_instr *instr,
                        ((wrmask >> (i * 4)) & 0xf) << comp;
 }
 
+static void
+set_writes_memory(const nir_shader *nir, struct radv_shader_info *info)
+{
+       if (nir->info.stage == MESA_SHADER_FRAGMENT)
+               info->ps.writes_memory = true;
+       else if (nir->info.stage == MESA_SHADER_GEOMETRY)
+               info->gs.writes_memory = true;
+}
+
 static void
 gather_intrinsic_store_deref_info(const nir_shader *nir,
                                const nir_intrinsic_instr *instr,
@@ -308,10 +317,7 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
                    instr->intrinsic == nir_intrinsic_image_deref_atomic_xor ||
                    instr->intrinsic == nir_intrinsic_image_deref_atomic_exchange ||
                    instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap) {
-                       if (nir->info.stage == MESA_SHADER_FRAGMENT)
-                               info->ps.writes_memory = true;
-                       else if (nir->info.stage == MESA_SHADER_GEOMETRY)
-                               info->gs.writes_memory = true;
+                       set_writes_memory(nir, info);
                }
                break;
        }
@@ -326,17 +332,28 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
        case nir_intrinsic_ssbo_atomic_xor:
        case nir_intrinsic_ssbo_atomic_exchange:
        case nir_intrinsic_ssbo_atomic_comp_swap:
-               if (nir->info.stage == MESA_SHADER_FRAGMENT)
-                       info->ps.writes_memory = true;
-               else if (nir->info.stage == MESA_SHADER_GEOMETRY)
-                       info->gs.writes_memory = true;
+               set_writes_memory(nir, info);
                break;
        case nir_intrinsic_load_deref:
                gather_intrinsic_load_deref_info(nir, instr, info);
                break;
        case nir_intrinsic_store_deref:
                gather_intrinsic_store_deref_info(nir, instr, info);
+               /* fallthrough */
+       case nir_intrinsic_deref_atomic_add:
+       case nir_intrinsic_deref_atomic_imin:
+       case nir_intrinsic_deref_atomic_umin:
+       case nir_intrinsic_deref_atomic_imax:
+       case nir_intrinsic_deref_atomic_umax:
+       case nir_intrinsic_deref_atomic_and:
+       case nir_intrinsic_deref_atomic_or:
+       case nir_intrinsic_deref_atomic_xor:
+       case nir_intrinsic_deref_atomic_exchange:
+       case nir_intrinsic_deref_atomic_comp_swap: {
+               if (nir_src_as_deref(instr->src[0])->mode & (nir_var_mem_global | nir_var_mem_ssbo))
+                       set_writes_memory(nir, info);
                break;
+       }
        default:
                break;
        }