+2020-09-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/26583
+ * config.bfd (targ64_selvecs, targ_selvecs): Add x86_64_pe_vec
+ to x86_64_pei_vec.
+ * reloc.c: Include "coff/internal.h".
+ (bfd_perform_relocation): Adjust relocation for PE/x86-64 inputs.
+
2020-09-16 Alan Modra <amodra@gmail.com>
* elf-bfd.h (elf_symbol_from): Remove unused ABFD parameter.
i[3-7]86-*-solaris2*)
targ_defvec=i386_elf32_sol2_vec
targ_selvecs="iamcu_elf32_vec i386_coff_vec i386_pei_vec"
- targ64_selvecs="x86_64_elf64_sol2_vec l1om_elf64_vec k1om_elf64_vec x86_64_pei_vec"
+ targ64_selvecs="x86_64_elf64_sol2_vec l1om_elf64_vec k1om_elf64_vec x86_64_pe_vec x86_64_pei_vec"
want64=true
;;
#ifdef BFD64
x86_64-*-solaris2*)
targ_defvec=i386_elf32_sol2_vec
- targ_selvecs="x86_64_elf64_sol2_vec l1om_elf64_vec k1om_elf64_vec iamcu_elf32_vec i386_coff_vec i386_pei_vec x86_64_pei_vec"
+ targ_selvecs="x86_64_elf64_sol2_vec l1om_elf64_vec k1om_elf64_vec iamcu_elf32_vec i386_coff_vec i386_pei_vec x86_64_pe_vec x86_64_pei_vec"
want64=true
;;
#endif
i[3-7]86-*-freebsd* | i[3-7]86-*-kfreebsd*-gnu)
targ_defvec=i386_elf32_fbsd_vec
targ_selvecs="i386_elf32_vec iamcu_elf32_vec i386_pei_vec i386_coff_vec"
- targ64_selvecs="x86_64_elf64_fbsd_vec x86_64_elf64_vec x86_64_pei_vec l1om_elf64_vec l1om_elf64_fbsd_vec k1om_elf64_vec k1om_elf64_fbsd_vec"
+ targ64_selvecs="x86_64_elf64_fbsd_vec x86_64_elf64_vec x86_64_pe_vec x86_64_pei_vec l1om_elf64_vec l1om_elf64_fbsd_vec k1om_elf64_vec k1om_elf64_fbsd_vec"
# FreeBSD <= 4.0 supports only the old nonstandard way of ABI labelling.
case "${targ}" in
i[3-7]86-*-freebsd3* | i[3-7]86-*-freebsd4 | i[3-7]86-*-freebsd4.0*)
i[3-7]86-*-linux-*)
targ_defvec=i386_elf32_vec
targ_selvecs="iamcu_elf32_vec i386_pei_vec"
- targ64_selvecs="x86_64_elf64_vec x86_64_elf32_vec x86_64_pei_vec l1om_elf64_vec k1om_elf64_vec"
+ targ64_selvecs="x86_64_elf64_vec x86_64_elf32_vec x86_64_pe_vec x86_64_pei_vec l1om_elf64_vec k1om_elf64_vec"
;;
i[3-7]86-*-redox*)
targ_defvec=i386_elf32_vec
targ_selvecs="i386_elf32_vec iamcu_elf32_vec x86_64_elf32_vec l1om_elf64_vec k1om_elf64_vec"
case "${targ}" in
x86_64-*-rtems*)
- targ_selvecs="${targ_selvecs} x86_64_pei_vec"
+ targ_selvecs="${targ_selvecs} x86_64_pe_vec x86_64_pei_vec"
esac
want64=true
;;
;;
x86_64-*-freebsd* | x86_64-*-kfreebsd*-gnu)
targ_defvec=x86_64_elf64_fbsd_vec
- targ_selvecs="i386_elf32_fbsd_vec iamcu_elf32_vec i386_coff_vec i386_pei_vec x86_64_pei_vec i386_elf32_vec x86_64_elf64_vec l1om_elf64_vec l1om_elf64_fbsd_vec k1om_elf64_vec k1om_elf64_fbsd_vec"
+ targ_selvecs="i386_elf32_fbsd_vec iamcu_elf32_vec i386_coff_vec i386_pei_vec x86_64_pe_vec x86_64_pei_vec i386_elf32_vec x86_64_elf64_vec l1om_elf64_vec l1om_elf64_fbsd_vec k1om_elf64_vec k1om_elf64_fbsd_vec"
want64=true
;;
x86_64-*-netbsd* | x86_64-*-openbsd*)
targ_defvec=x86_64_elf64_vec
- targ_selvecs="i386_elf32_vec iamcu_elf32_vec i386_coff_vec i386_pei_vec x86_64_pei_vec l1om_elf64_vec k1om_elf64_vec"
+ targ_selvecs="i386_elf32_vec iamcu_elf32_vec i386_coff_vec i386_pei_vec x86_64_pe_vec x86_64_pei_vec l1om_elf64_vec k1om_elf64_vec"
want64=true
;;
x86_64-*-linux-*)
targ_defvec=x86_64_elf64_vec
- targ_selvecs="i386_elf32_vec iamcu_elf32_vec x86_64_elf32_vec i386_pei_vec x86_64_pei_vec l1om_elf64_vec k1om_elf64_vec"
+ targ_selvecs="i386_elf32_vec iamcu_elf32_vec x86_64_elf32_vec i386_pei_vec x86_64_pe_vec x86_64_pei_vec l1om_elf64_vec k1om_elf64_vec"
want64=true
;;
x86_64-*-mingw* | x86_64-*-pe | x86_64-*-pep | x86_64-*-cygwin)
#include "bfdlink.h"
#include "libbfd.h"
#include "bfdver.h"
+#include "coff/internal.h"
/*
DOCDD
INODE
}
}
}
+ else if (abfd->xvec->flavour == bfd_target_coff_flavour
+ && (input_section->output_section->owner->xvec->flavour
+ == bfd_target_elf_flavour)
+ && strcmp (abfd->xvec->name, "pe-x86-64") == 0
+ && strcmp (input_section->output_section->owner->xvec->name,
+ "elf64-x86-64") == 0)
+ {
+ /* NB: bfd_perform_relocation isn't called to generate PE binary.
+ _bfd_relocate_contents is called instead. When linking PE
+ object files to generate ELF output, _bfd_relocate_contents
+ isn't called and bfd_perform_relocation is used. We need to
+ adjust relocation here. */
+ relocation -= reloc_entry->addend;
+ if (howto->type >= R_AMD64_PCRLONG_1
+ && howto->type <= R_AMD64_PCRLONG_5)
+ relocation -= (bfd_vma)(howto->type - R_AMD64_PCRLONG);
+ }
/* FIXME: This overflow checking is incomplete, because the value
might have overflowed before we get here. For a correct check we
+2020-09-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR ld/26583
+ * testsuite/ld-x86-64/pe-x86-64-1.od: New file.
+ * testsuite/ld-x86-64/pe-x86-64-1a.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-1b.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-1c.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-2.od: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-2a.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-2b.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-2c.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-3.od: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-3a.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-3b.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-3c.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-3d.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-4.od: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-4a.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-4b.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-4c.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64-4d.obj.bz2: Likewise.
+ * testsuite/ld-x86-64/pe-x86-64.exp: Likewise.
+ * testsuite/lib/ld-lib.exp (run_ld_link_tests): Handle bz2 binary
+ inputs.
+
2020-09-16 Alan Modra <amodra@gmail.com>
* plugin.c (asymbol_from_plugin_symbol): Adjust elf_symbol_from
--- /dev/null
+
+.*: +file format .*
+
+SYMBOL TABLE:
+0+401000 l d .text\$mn 0000000000000000 .text\$mn
+0+402000 l d .xdata 0000000000000000 .xdata
+0+402008 l d .pdata 0000000000000000 .pdata
+0+403014 l d .bss 0000000000000000 .bss
+0+ l d .debug\$S 0000000000000000 .debug\$S
+0+401000 g .text\$mn 0000000000000000 getaddr1
+0+401020 g .text\$mn 0000000000000000 begin
+0+403014 g .bss 0000000000000000 __bss_start
+0+403014 g .bss 0000000000000000 var
+0+401010 g .text\$mn 0000000000000000 getaddr2
+0+403014 g .bss 0000000000000000 _edata
+0+403018 g .bss 0000000000000000 _end
+
+
+
+Disassembly of section .text\$mn:
+
+0+401000 <getaddr1>:
+ +[a-f0-9]+: 48 8d 05 0d 20 00 00 lea 0x200d\(%rip\),%rax # 403014 <__bss_start>
+ +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+401010 <getaddr2>:
+ +[a-f0-9]+: 48 8d 05 fd 1f 00 00 lea 0x1ffd\(%rip\),%rax # 403014 <__bss_start>
+ +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+401020 <begin>:
+ +[a-f0-9]+: 48 83 ec 28 sub \$0x28,%rsp
+ +[a-f0-9]+: e8 d7 ff ff ff call 401000 <getaddr1>
+ +[a-f0-9]+: e8 e2 ff ff ff call 401010 <getaddr2>
+ +[a-f0-9]+: 48 83 c4 28 add \$0x28,%rsp
+ +[a-f0-9]+: c3 ret
+#pass
--- /dev/null
+
+.*: +file format .*
+
+SYMBOL TABLE:
+0+401000 l d .text\$mn 0000000000000000 .text\$mn
+0+402000 l d .xdata 0000000000000000 .xdata
+0+402008 l d .pdata 0000000000000000 .pdata
+0+403014 l d .bss 0000000000000000 .bss
+0+ l d .debug\$S 0000000000000000 .debug\$S
+0+401000 g .text\$mn 0000000000000000 getaddr1
+0+401020 g .text\$mn 0000000000000000 begin
+0+403014 g .bss 0000000000000000 __bss_start
+0+403014 g .bss 0000000000000000 var
+0+401010 g .text\$mn 0000000000000000 getaddr2
+0+403014 g .bss 0000000000000000 _edata
+0+403018 g .bss 0000000000000000 _end
+
+
+
+Disassembly of section .text\$mn:
+
+0+401000 <getaddr1>:
+ +[a-f0-9]+: 48 8d 05 0d 20 00 00 lea 0x200d\(%rip\),%rax # 403014 <__bss_start>
+ +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+401010 <getaddr2>:
+ +[a-f0-9]+: 48 8d 05 fd 1f 00 00 lea 0x1ffd\(%rip\),%rax # 403014 <__bss_start>
+ +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+401020 <begin>:
+ +[a-f0-9]+: 48 83 ec 28 sub \$0x28,%rsp
+ +[a-f0-9]+: e8 d7 ff ff ff call 401000 <getaddr1>
+ +[a-f0-9]+: e8 e2 ff ff ff call 401010 <getaddr2>
+ +[a-f0-9]+: 48 83 c4 28 add \$0x28,%rsp
+ +[a-f0-9]+: c3 ret
+#pass
--- /dev/null
+
+.*: +file format .*
+
+SYMBOL TABLE:
+0+401000 l d .text\$mn 0000000000000000 .text\$mn
+0+402000 l d .xdata 0000000000000000 .xdata
+0+402008 l d .pdata 0000000000000000 .pdata
+0+403014 l d .bss 0000000000000000 .bss
+0+ l d .debug\$S 0000000000000000 .debug\$S
+0+401000 g .text\$mn 0000000000000000 getaddr1
+0+401020 g .text\$mn 0000000000000000 begin
+0+403014 g .bss 0000000000000000 __bss_start
+0+403014 g .bss 0000000000000000 var
+0+401010 g .text\$mn 0000000000000000 getaddr2
+0+403014 g .bss 0000000000000000 _edata
+0+403018 g .bss 0000000000000000 _end
+
+
+
+Disassembly of section .text\$mn:
+
+0+401000 <getaddr1>:
+ +[a-f0-9]+: 48 8d 05 0d 20 00 00 lea 0x200d\(%rip\),%rax # 403014 <__bss_start>
+ +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+401010 <getaddr2>:
+ +[a-f0-9]+: 48 8d 05 fd 1f 00 00 lea 0x1ffd\(%rip\),%rax # 403014 <__bss_start>
+ +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
+
+0+401020 <begin>:
+ +[a-f0-9]+: 48 83 ec 28 sub \$0x28,%rsp
+ +[a-f0-9]+: e8 d7 ff ff ff call 401000 <getaddr1>
+ +[a-f0-9]+: e8 e2 ff ff ff call 401010 <getaddr2>
+ +[a-f0-9]+: 48 83 c4 28 add \$0x28,%rsp
+ +[a-f0-9]+: c3 ret
+#pass
--- /dev/null
+
+.*: +file format .*
+
+SYMBOL TABLE:
+0+401000 l d .text\$mn 0000000000000000 .text\$mn
+0+402000 l d .xdata 0000000000000000 .xdata
+0+402008 l d .pdata 0000000000000000 .pdata
+0+403018 l d .data 0000000000000000 .data
+0+403038 l d .bss 0000000000000000 .bss
+0+ l d .debug\$S 0000000000000000 .debug\$S
+0+403038 g .bss 0000000000000000 c
+0+401000 g .text\$mn 0000000000000000 begin
+0+403038 g .bss 0000000000000000 __bss_start
+0+403018 g .data 0000000000000000 Struct
+0+401020 g .text\$mn 0000000000000000 opti_O1
+0+403038 g .data 0000000000000000 _edata
+0+403040 g .bss 0000000000000000 _end
+0+401060 g .text\$mn 0000000000000000 opti_Od
+
+
+
+Disassembly of section .text\$mn:
+
+0+401000 <begin>:
+ +[a-f0-9]+: 48 83 ec 28 sub \$0x28,%rsp
+ +[a-f0-9]+: 48 c7 05 29 20 00 00 01 00 00 00 movq \$0x1,0x2029\(%rip\) # 403038 <__bss_start>
+ +[a-f0-9]+: e8 4c 00 00 00 call 401060 <opti_Od>
+ +[a-f0-9]+: e8 07 00 00 00 call 401020 <opti_O1>
+ +[a-f0-9]+: 48 83 c4 28 add \$0x28,%rsp
+ +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 66 90 xchg %ax,%ax
+
+0+401020 <opti_O1>:
+ +[a-f0-9]+: b8 33 22 00 00 mov \$0x2233,%eax
+ +[a-f0-9]+: c6 05 ec 1f 00 00 12 movb \$0x12,0x1fec\(%rip\) # 403018 <Struct>
+ +[a-f0-9]+: 66 89 05 e7 1f 00 00 mov %ax,0x1fe7\(%rip\) # 40301a <Struct\+0x2>
+ +[a-f0-9]+: 48 b8 99 99 99 99 88 88 88 88 movabs \$0x8888888899999999,%rax
+ +[a-f0-9]+: 48 89 05 dc 1f 00 00 mov %rax,0x1fdc\(%rip\) # 403020 <Struct\+0x8>
+ +[a-f0-9]+: 83 c8 ff or \$0xffffffff,%eax
+ +[a-f0-9]+: c7 05 cb 1f 00 00 55 55 44 44 movl \$0x44445555,0x1fcb\(%rip\) # 40301c <Struct\+0x4>
+ +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
+ +[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
+
+0+401060 <opti_Od>:
+ +[a-f0-9]+: 48 89 4c 24 08 mov %rcx,0x8\(%rsp\)
+ +[a-f0-9]+: b8 10 00 00 00 mov \$0x10,%eax
+ +[a-f0-9]+: 48 6b c0 00 imul \$0x0,%rax,%rax
+ +[a-f0-9]+: 48 8d 0d a3 1f 00 00 lea 0x1fa3\(%rip\),%rcx # 403018 <Struct>
+ +[a-f0-9]+: c6 04 01 11 movb \$0x11,\(%rcx,%rax,1\)
+ +[a-f0-9]+: b8 10 00 00 00 mov \$0x10,%eax
+ +[a-f0-9]+: 48 6b c0 00 imul \$0x0,%rax,%rax
+ +[a-f0-9]+: 48 8d 0d 8f 1f 00 00 lea 0x1f8f\(%rip\),%rcx # 403018 <Struct>
+ +[a-f0-9]+: ba 22 22 00 00 mov \$0x2222,%edx
+ +[a-f0-9]+: 66 89 54 01 02 mov %dx,0x2\(%rcx,%rax,1\)
+ +[a-f0-9]+: b8 10 00 00 00 mov \$0x10,%eax
+ +[a-f0-9]+: 48 6b c0 00 imul \$0x0,%rax,%rax
+ +[a-f0-9]+: 48 8d 0d 75 1f 00 00 lea 0x1f75\(%rip\),%rcx # 403018 <Struct>
+ +[a-f0-9]+: c7 44 01 04 44 44 44 44 movl \$0x44444444,0x4\(%rcx,%rax,1\)
+ +[a-f0-9]+: b8 10 00 00 00 mov \$0x10,%eax
+ +[a-f0-9]+: 48 6b c0 00 imul \$0x0,%rax,%rax
+ +[a-f0-9]+: 48 8d 0d 5d 1f 00 00 lea 0x1f5d\(%rip\),%rcx # 403018 <Struct>
+ +[a-f0-9]+: 48 ba 88 88 88 88 88 88 88 88 movabs \$0x8888888888888888,%rdx
+ +[a-f0-9]+: 48 89 54 01 08 mov %rdx,0x8\(%rcx,%rax,1\)
+ +[a-f0-9]+: b8 ff ff ff ff mov \$0xffffffff,%eax
+ +[a-f0-9]+: c3 ret
+#pass
--- /dev/null
+# Expect script for ELF tests with pe-x86-64 inputs.
+# Copyright (C) 2020 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+#
+
+# Only for Linux/x86-64.
+if {![istarget "x86_64-*-linux*"] } {
+ return
+}
+
+run_ld_link_tests [list \
+ [list \
+ "Build pe-x86-64-1" \
+ "-m elf_x86_64 --entry=begin" \
+ "" \
+ "" \
+ {pe-x86-64-1a.obj.bz2 pe-x86-64-1b.obj.bz2 pe-x86-64-1c.obj.bz2} \
+ {{objdump {-dw --sym} pe-x86-64-1.od}} \
+ "pe-x86-64-1" \
+ ] \
+ [list \
+ "Build pe-x86-64-2" \
+ "-m elf_x86_64 --entry=begin" \
+ "" \
+ "" \
+ {pe-x86-64-2a.obj.bz2 pe-x86-64-2b.obj.bz2 pe-x86-64-2c.obj.bz2} \
+ {{objdump {-dw --sym} pe-x86-64-2.od}} \
+ "pe-x86-64-2" \
+ ] \
+ [list \
+ "Build pe-x86-64-3" \
+ "-m elf_x86_64 --entry=begin" \
+ "" \
+ "" \
+ {pe-x86-64-3a.obj.bz2 pe-x86-64-3b.obj.bz2 pe-x86-64-3c.obj.bz2 \
+ pe-x86-64-3d.obj.bz2 } \
+ {{objdump {-dw --sym} pe-x86-64-3.od}} \
+ "pe-x86-64-3" \
+ ] \
+ [list \
+ "Build pe-x86-64-4" \
+ "-m elf_x86_64 --entry=begin" \
+ "" \
+ "" \
+ {pe-x86-64-4a.obj.bz2 pe-x86-64-4b.obj.bz2 pe-x86-64-4c.obj.bz2 \
+ pe-x86-64-4d.obj.bz2 } \
+ {{objdump {-dw --sym} pe-x86-64-4.od}} \
+ "pe-x86-64-4" \
+ ] \
+]
# Assemble each file in the test.
foreach src_file $src_files {
set fileroot "[file rootname [file tail $src_file]]"
- set objfile "tmpdir/$fileroot.o"
- lappend objfiles $objfile
- if { [file extension $src_file] == ".c" } {
- set as_file "tmpdir/$fileroot.s"
- if ![ld_compile "$CC -S $CFLAGS $cflags" $srcdir/$subdir/$src_file $as_file] {
+ if { [file extension $src_file] == ".bz2" } {
+ set objfile tmpdir/[file rootname $src_file]
+ set unbzip2 "system \"bzip2 -dc $srcdir/$subdir/$src_file > $objfile\""
+ send_log "$unbzip2\n"
+ catch "$unbzip2" exec_output
+ if ![string match "" $exec_output] then {
+ send_log "$exec_output\n"
set is_unresolved 1
break
}
} else {
- set as_file "$srcdir/$subdir/$src_file"
- }
- if ![ld_assemble $as "$as_options $as_file" $objfile] {
- set failed 1
- break
+ set objfile "tmpdir/$fileroot.o"
+ if { [file extension $src_file] == ".c" } {
+ set as_file "tmpdir/$fileroot.s"
+ if ![ld_compile "$CC -S $CFLAGS $cflags" $srcdir/$subdir/$src_file $as_file] {
+ set is_unresolved 1
+ break
+ }
+ } else {
+ set as_file "$srcdir/$subdir/$src_file"
+ }
+ if ![ld_assemble $as "$as_options $as_file" $objfile] {
+ set failed 1
+ break
+ }
}
+ lappend objfiles $objfile
}
# Catch assembler errors.
projects / binutils-gdb.git / commitdiff