If the previously seen instruction generates more fields than the new
instruction, still allow CSE to happen. This doesn't do much, but it
also enables a couple more shaders in the next patch. It helped quite a
bit in another change series that I have (at least for now) abandoned.
v2: Add some extra comentary about the parameters to instructions_match.
Suggested by Ken.
No changes on Skylake, Broadwell, Iron Lake or GM45.
Ivy Bridge and Haswell had similar results. (Ivy Bridge shown)
total instructions in shared programs:
11780295 ->
11780294 (<.01%)
instructions in affected programs: 302 -> 301 (-0.33%)
helped: 1
HURT: 0
total cycles in shared programs:
257308315 ->
257308313 (<.01%)
cycles in affected programs: 2074 -> 2072 (-0.10%)
helped: 1
HURT: 0
Sandy Bridge
total instructions in shared programs:
10506687 ->
10506686 (<.01%)
instructions in affected programs: 335 -> 334 (-0.30%)
helped: 1
HURT: 0
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
}
}
+/**
+ * Checks if instructions match, exactly for sources, but loosely for
+ * destination writemasks.
+ *
+ * \param 'a' is the generating expression from the AEB entry.
+ * \param 'b' is the second occurrence of the expression that we're
+ * considering eliminating.
+ */
static bool
instructions_match(vec4_instruction *a, vec4_instruction *b)
{
a->base_mrf == b->base_mrf &&
a->header_size == b->header_size &&
a->shadow_compare == b->shadow_compare &&
- a->dst.writemask == b->dst.writemask &&
+ ((a->dst.writemask & b->dst.writemask) == a->dst.writemask) &&
a->force_writemask_all == b->force_writemask_all &&
a->size_written == b->size_written &&
a->exec_size == b->exec_size &&