+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * cpu-maxq.c: Delete file.
+ * coff-maxq.c: Delete file.
+ * Makefile.am: Remove references to maxq.
+ * archures.c: Likewise.
+ * coffcode.h: Likewise.
+ * configure.in: Likewise.
+ * targets.c: Likewise.
+ * config.bfd: Move maxq from obsolete to removed.
+ * Makefile.in: Regenerate.
+ * bfd-in2.h: Regenerate.
+ * configure: Regenerate.
+ * libbfd.h: Regenerate.
+ * po/SRC-POTFILES.in: Regenerate.
+
2010-06-28 Alan Modra <amodra@gmail.com>
* compress.c (bfd_uncompress_section_contents): Use ATTRIBUTE_UNUSED
cpu-m68hc12.lo \
cpu-m68k.lo \
cpu-m88k.lo \
- cpu-maxq.lo \
cpu-mcore.lo \
cpu-mep.lo \
cpu-microblaze.lo \
cpu-m68hc12.c \
cpu-m68k.c \
cpu-m88k.c \
- cpu-maxq.c \
cpu-mcore.c \
cpu-mep.c \
cpu-microblaze.c \
coff-i960.lo \
coff-m68k.lo \
coff-m88k.lo \
- coff-maxq.lo \
coff-mips.lo \
coff-or32.lo \
coff-rs6000.lo \
coff-i960.c \
coff-m68k.c \
coff-m88k.c \
- coff-maxq.c \
coff-mips.c \
coff-or32.c \
coff-rs6000.c \
cpu-m68hc12.lo \
cpu-m68k.lo \
cpu-m88k.lo \
- cpu-maxq.lo \
cpu-mcore.lo \
cpu-mep.lo \
cpu-microblaze.lo \
cpu-m68hc12.c \
cpu-m68k.c \
cpu-m88k.c \
- cpu-maxq.c \
cpu-mcore.c \
cpu-mep.c \
cpu-microblaze.c \
coff-i960.lo \
coff-m68k.lo \
coff-m88k.lo \
- coff-maxq.lo \
coff-mips.lo \
coff-or32.lo \
coff-rs6000.lo \
coff-i960.c \
coff-m68k.c \
coff-m88k.c \
- coff-maxq.c \
coff-mips.c \
coff-or32.c \
coff-rs6000.c \
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-i960.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-m68k.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-m88k.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-maxq.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-mips.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-or32.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-rs6000.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m68hc12.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m68k.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-m88k.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-maxq.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mcore.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mep.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-microblaze.Plo@am__quote@
.#define bfd_mach_xc16xs 3
. bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
.#define bfd_mach_xtensa 1
-. bfd_arch_maxq, {* Dallas MAXQ 10/20 *}
-.#define bfd_mach_maxq10 10
-.#define bfd_mach_maxq20 20
. bfd_arch_z80,
.#define bfd_mach_z80strict 1 {* No undocumented opcodes. *}
.#define bfd_mach_z80 3 {* With ixl, ixh, iyl, and iyh. *}
extern const bfd_arch_info_type bfd_m68hc12_arch;
extern const bfd_arch_info_type bfd_m68k_arch;
extern const bfd_arch_info_type bfd_m88k_arch;
-extern const bfd_arch_info_type bfd_maxq_arch;
extern const bfd_arch_info_type bfd_mcore_arch;
extern const bfd_arch_info_type bfd_mep_arch;
extern const bfd_arch_info_type bfd_mips_arch;
&bfd_m68hc12_arch,
&bfd_m68k_arch,
&bfd_m88k_arch,
- &bfd_maxq_arch,
&bfd_mcore_arch,
&bfd_mep_arch,
&bfd_microblaze_arch,
#define bfd_mach_xc16xs 3
bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
#define bfd_mach_xtensa 1
- bfd_arch_maxq, /* Dallas MAXQ 10/20 */
-#define bfd_mach_maxq10 10
-#define bfd_mach_maxq20 20
bfd_arch_z80,
#define bfd_mach_z80strict 1 /* No undocumented opcodes. */
#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */
+++ /dev/null
-/* BFD back-end for MAXQ COFF binaries.
- Copyright 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
-
- Contributed by Vineet Sharma (vineets@noida.hcltech.com) Inderpreet S.
- (inderpreetb@noida.hcltech.com)
-
- HCL Technologies Ltd.
-
- This file is part of BFD, the Binary File Descriptor library.
-
- This program is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published by the Free
- Software Foundation; either version 3 of the License, or (at your option)
- any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-
-#include "sysdep.h"
-#include "bfd.h"
-#include "libbfd.h"
-#include "coff/maxq.h"
-#include "coff/internal.h"
-#include "libcoff.h"
-#include "libiberty.h"
-
-#ifndef MAXQ20
-#define MAXQ20 1
-#endif
-
-#define RTYPE2HOWTO(cache_ptr, dst) \
- ((cache_ptr)->howto = \
- ((dst)->r_type < 48 \
- ? howto_table + (((dst)->r_type==47) ? 6: ((dst)->r_type)) \
- : NULL))
-
-#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (2)
-
-/* Code to swap in the reloc offset. */
-#define SWAP_IN_RELOC_OFFSET H_GET_16
-#define SWAP_OUT_RELOC_OFFSET H_PUT_16
-
-#define SHORT_JUMP BFD_RELOC_16_PCREL_S2
-#define LONG_JUMP BFD_RELOC_14
-#define ABSOLUTE_ADDR_FOR_DATA BFD_RELOC_24
-
-/* checks the range of short jump -127 to 128 */
-#define IS_SJUMP_RANGE(x) ((x > -128) && (x < 129))
-#define HIGH_WORD_MASK 0xff00
-#define LOW_WORD_MASK 0x00ff
-
-static long
-get_symbol_value (asymbol *symbol)
-{
- long relocation = 0;
-
- if (bfd_is_com_section (symbol->section))
- relocation = 0;
- else
- relocation = symbol->value +
- symbol->section->output_section->vma + symbol->section->output_offset;
-
- return relocation;
-}
-
-/* This function performs all the maxq relocations.
- FIXME: The handling of the addend in the 'BFD_*'
- relocations types. */
-
-static bfd_reloc_status_type
-coff_maxq20_reloc (bfd * abfd,
- arelent * reloc_entry,
- asymbol * symbol_in,
- void * data,
- asection * input_section ATTRIBUTE_UNUSED,
- bfd * output_bfd ATTRIBUTE_UNUSED,
- char ** error_message ATTRIBUTE_UNUSED)
-{
- unsigned char *addr = NULL;
- unsigned long x = 0;
- long call_addr = 0;
- short addend = 0;
- long diff = 0;
-
- /* If this is an undefined symbol, return error. */
- if (symbol_in->section == &bfd_und_section
- && (symbol_in->flags & BSF_WEAK) == 0)
- return bfd_reloc_continue;
-
- if (data && reloc_entry)
- {
- addr = (unsigned char *) data + reloc_entry->address;
- call_addr = call_addr - call_addr;
- call_addr = get_symbol_value (symbol_in);
-
- /* Over here the value val stores the 8 bit/16 bit value. We will put a
- check if we are moving a 16 bit immediate value into an 8 bit
- register. In that case we will generate a Upper bytes into PFX[0]
- and move the lower 8 bits as SRC. */
-
- switch (reloc_entry->howto->type)
- {
- /* BFD_RELOC_16_PCREL_S2 47 Handles all the relative jumps and
- calls Note: Every relative jump or call is in words. */
- case SHORT_JUMP:
- /* Handle any addend. */
- addend = reloc_entry->addend;
-
- if (addend > call_addr || addend > 0)
- call_addr = symbol_in->section->output_section->vma + addend;
- else if (addend < call_addr && addend > 0)
- call_addr = call_addr + addend;
- else if (addend < 0)
- call_addr = call_addr + addend;
-
- diff = ((call_addr << 1) - (reloc_entry->address << 1));
-
- if (!IS_SJUMP_RANGE (diff))
- {
- bfd_perror (_("Can't Make it a Short Jump"));
- return bfd_reloc_outofrange;
- }
-
- x = bfd_get_16 (abfd, addr);
-
- x = x & LOW_WORD_MASK;
- x = x | (diff << 8);
- bfd_put_16 (abfd, (bfd_vma) x, addr);
-
- return bfd_reloc_ok;
-
- case ABSOLUTE_ADDR_FOR_DATA:
- case LONG_JUMP:
- /* BFD_RELOC_14 Handles intersegment or long jumps which might be
- from code to code or code to data segment jumps. Note: When this
- fucntion is called by gas the section flags somehow do not
- contain the info about the section type(CODE or DATA). Thus the
- user needs to evoke the linker after assembling the files
- because the Code-Code relocs are word aligned but code-data are
- byte aligned. */
- addend = (reloc_entry->addend - reloc_entry->addend);
-
- /* Handle any addend. */
- addend = reloc_entry->addend;
-
- /* For relocation involving multiple file added becomes zero thus
- this fails - check for zero added. In another case when we try
- to add a stub to a file the addend shows the offset from the
- start od this file. */
- addend = 0;
-
- if (!bfd_is_com_section (symbol_in->section) &&
- ((symbol_in->flags & BSF_OLD_COMMON) == 0))
- {
- if (reloc_entry->addend > symbol_in->value)
- addend = reloc_entry->addend - symbol_in->value;
-
- if ((reloc_entry->addend < symbol_in->value)
- && (reloc_entry->addend != 0))
- addend = reloc_entry->addend - symbol_in->value;
-
- if (reloc_entry->addend == symbol_in->value)
- addend = 0;
- }
-
- if (bfd_is_com_section (symbol_in->section) ||
- ((symbol_in->flags & BSF_OLD_COMMON) != 0))
- addend = reloc_entry->addend;
-
- if (addend < 0
- && (call_addr < (long) (addend * (-1))))
- addend = 0;
-
- call_addr += addend;
-
- /* FIXME: This check does not work well with the assembler,
- linker needs to be run always. */
- if ((symbol_in->section->flags & SEC_CODE) == SEC_CODE)
- {
- /* Convert it into words. */
- call_addr = call_addr >> 1;
-
- if (call_addr > 0xFFFF) /* Intersegment Jump. */
- {
- bfd_perror (_("Exceeds Long Jump Range"));
- return bfd_reloc_outofrange;
- }
- }
- else
- {
- /* case ABSOLUTE_ADDR_FOR_DATA : Resolves any code-data
- segemnt relocs. These are NOT word aligned. */
-
- if (call_addr > 0xFFFF) /* Intersegment Jump. */
- {
- bfd_perror (_("Absolute address Exceeds 16 bit Range"));
- return bfd_reloc_outofrange;
- }
- }
-
- x = bfd_get_32 (abfd, addr);
-
- x = (x & 0xFF00FF00);
- x = (x | ((call_addr & HIGH_WORD_MASK) >> 8));
- x = (x | (call_addr & LOW_WORD_MASK) << 16);
-
- bfd_put_32 (abfd, (bfd_vma) x, addr);
- return bfd_reloc_ok;
-
- case BFD_RELOC_8:
- addend = (reloc_entry->addend - reloc_entry->addend);
-
- if (!bfd_is_com_section (symbol_in->section) &&
- ((symbol_in->flags & BSF_OLD_COMMON) == 0))
- {
- if (reloc_entry->addend > symbol_in->value)
- addend = reloc_entry->addend - symbol_in->value;
- if (reloc_entry->addend < symbol_in->value)
- addend = reloc_entry->addend - symbol_in->value;
- if (reloc_entry->addend == symbol_in->value)
- addend = 0;
- }
-
- if (bfd_is_com_section (symbol_in->section) ||
- ((symbol_in->flags & BSF_OLD_COMMON) != 0))
- addend = reloc_entry->addend;
-
- if (addend < 0
- && (call_addr < (long) (addend * (-1))))
- addend = 0;
-
- if (call_addr + addend > 0xFF)
- {
- bfd_perror (_("Absolute address Exceeds 8 bit Range"));
- return bfd_reloc_outofrange;
- }
-
- x = bfd_get_8 (abfd, addr);
- x = x & 0x00;
- x = x | (call_addr + addend);
-
- bfd_put_8 (abfd, (bfd_vma) x, addr);
- return bfd_reloc_ok;
-
- case BFD_RELOC_16:
- addend = (reloc_entry->addend - reloc_entry->addend);
- if (!bfd_is_com_section (symbol_in->section) &&
- ((symbol_in->flags & BSF_OLD_COMMON) == 0))
- {
- if (reloc_entry->addend > symbol_in->value)
- addend = reloc_entry->addend - symbol_in->value;
-
- if (reloc_entry->addend < symbol_in->value)
- addend = reloc_entry->addend - symbol_in->value;
-
- if (reloc_entry->addend == symbol_in->value)
- addend = 0;
- }
-
- if (bfd_is_com_section (symbol_in->section) ||
- ((symbol_in->flags & BSF_OLD_COMMON) != 0))
- addend = reloc_entry->addend;
-
- if (addend < 0
- && (call_addr < (long) (addend * (-1))))
- addend = 0;
-
- if ((call_addr + addend) > 0xFFFF)
- {
- bfd_perror (_("Absolute address Exceeds 16 bit Range"));
- return bfd_reloc_outofrange;
- }
- else
- {
- unsigned short val = (call_addr + addend);
-
- x = bfd_get_16 (abfd, addr);
-
- /* LE */
- x = (x & 0x0000); /* Flush garbage value. */
- x = val;
- if ((symbol_in->section->flags & SEC_CODE) == SEC_CODE)
- x = x >> 1; /* Convert it into words. */
- }
-
- bfd_put_16 (abfd, (bfd_vma) x, addr);
- return bfd_reloc_ok;
-
- case BFD_RELOC_32:
- addend = (reloc_entry->addend - reloc_entry->addend);
-
- if (!bfd_is_com_section (symbol_in->section) &&
- ((symbol_in->flags & BSF_OLD_COMMON) == 0))
- {
- if (reloc_entry->addend > symbol_in->value)
- addend = reloc_entry->addend - symbol_in->value;
- if (reloc_entry->addend < symbol_in->value)
- addend = reloc_entry->addend - symbol_in->value;
- if (reloc_entry->addend == symbol_in->value)
- addend = 0;
- }
-
- if (bfd_is_com_section (symbol_in->section) ||
- ((symbol_in->flags & BSF_OLD_COMMON) != 0))
- addend = reloc_entry->addend;
-
- if (addend < 0
- && (call_addr < (long) (addend * (-1))))
- addend = 0;
-
- if ((call_addr + addend) < 0)
- {
- bfd_perror ("Absolute address Exceeds 32 bit Range");
- return bfd_reloc_outofrange;
- }
-
- x = bfd_get_32 (abfd, addr);
- x = (x & 0x0000); /* Flush garbage value. */
- x = call_addr + addend;
- if ((symbol_in->section->flags & SEC_CODE) == SEC_CODE)
- x = x >> 1; /* Convert it into words. */
-
- bfd_put_32 (abfd, (bfd_vma) x, addr);
- return bfd_reloc_ok;
-
- default:
- bfd_perror (_("Unrecognized Reloc Type"));
- return bfd_reloc_notsupported;
- }
- }
-
- return bfd_reloc_notsupported;
-}
-
-static reloc_howto_type howto_table[] =
-{
- EMPTY_HOWTO (0),
- EMPTY_HOWTO (1),
- {
- BFD_RELOC_32, 0, 1, 8, FALSE, 0, complain_overflow_bitfield,
- coff_maxq20_reloc, "32Bit", TRUE, 0x000000ff, 0x000000ff, TRUE
- },
- {
- SHORT_JUMP, 0, 1, 8, FALSE, 0, complain_overflow_bitfield,
- coff_maxq20_reloc, "SHORT_JMP", TRUE, 0x000000ff, 0x000000ff, TRUE
- },
- {
- ABSOLUTE_ADDR_FOR_DATA, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
- coff_maxq20_reloc, "INTERSEGMENT_RELOC", TRUE, 0x00000000, 0x00000000,
- FALSE
- },
- {
- BFD_RELOC_16, 0, 1, 8, FALSE, 0, complain_overflow_bitfield,
- coff_maxq20_reloc, "16Bit", TRUE, 0x000000ff, 0x000000ff, TRUE
- },
- {
- LONG_JUMP, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
- coff_maxq20_reloc, "LONG_JUMP", TRUE, 0x00000000, 0x00000000, FALSE
- },
- {
- BFD_RELOC_8, 0, 1, 8, FALSE, 0, complain_overflow_bitfield,
- coff_maxq20_reloc, "8bit", TRUE, 0x000000ff, 0x000000ff, TRUE
- },
- EMPTY_HOWTO (8),
- EMPTY_HOWTO (9),
- EMPTY_HOWTO (10),
-};
-
-static reloc_howto_type *
-maxq_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
- bfd_reloc_code_real_type code)
-{
- switch (code)
- {
- /* SHORT JUMP */
- case BFD_RELOC_16_PCREL_S2:
- return howto_table + 3;
-
- /* INTERSEGMENT JUMP */
- case BFD_RELOC_24:
- return howto_table + 4;
-
- /* BYTE RELOC */
- case BFD_RELOC_8:
- return howto_table + 7;
-
- /* WORD RELOC */
- case BFD_RELOC_16:
- return howto_table + 5;
-
- /* LONG RELOC */
- case BFD_RELOC_32:
- return howto_table + 2;
-
- /* LONG JUMP */
- case BFD_RELOC_14:
- return howto_table + 6;
-
- default:
- return NULL;
- }
-}
-
-static reloc_howto_type *
-maxq_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name)
-{
- unsigned int i;
-
- for (i = 0; i < sizeof (howto_table) / sizeof (howto_table[0]); i++)
- if (howto_table[i].name != NULL
- && strcasecmp (howto_table[i].name, r_name) == 0)
- return &howto_table[i];
-
- return NULL;
-}
-
-#define coff_bfd_reloc_type_lookup maxq_reloc_type_lookup
-#define coff_bfd_reloc_name_lookup maxq_reloc_name_lookup
-
-/* Perform any necessary magic to the addend in a reloc entry. */
-#define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
- cache_ptr->addend = ext_reloc.r_offset;
-
-#ifndef bfd_pe_print_pdata
-#define bfd_pe_print_pdata NULL
-#endif
-
-#include "coffcode.h"
-
-#ifndef TARGET_UNDERSCORE
-#define TARGET_UNDERSCORE 1
-#endif
-
-#ifndef EXTRA_S_FLAGS
-#define EXTRA_S_FLAGS 0
-#endif
-
-/* Forward declaration for use initialising alternative_target field. */
-CREATE_LITTLE_COFF_TARGET_VEC (maxqcoff_vec, "coff-maxq", 0, EXTRA_S_FLAGS,
- TARGET_UNDERSCORE, NULL, COFF_SWAP_TABLE);
-
machine = bfd_mach_m68020;
break;
#endif
-#ifdef MAXQ20MAGIC
- case MAXQ20MAGIC:
- arch = bfd_arch_maxq;
- switch (internal_f->f_flags & F_MACHMASK)
- {
- case F_MAXQ10:
- machine = bfd_mach_maxq10;
- break;
- case F_MAXQ20:
- machine = bfd_mach_maxq20;
- break;
- default:
- return FALSE;
- }
- break;
-#endif
#ifdef MC88MAGIC
case MC88MAGIC:
case MC88DMAGIC:
return TRUE;
#endif
-#ifdef MAXQ20MAGIC
- case bfd_arch_maxq:
- * magicp = MAXQ20MAGIC;
- switch (bfd_get_mach (abfd))
- {
- case bfd_mach_maxq10: * flagsp = F_MAXQ10; return TRUE;
- case bfd_mach_maxq20: * flagsp = F_MAXQ20; return TRUE;
- default: return FALSE;
- }
-#endif
-
default: /* Unknown architecture. */
/* Fall through to "return FALSE" below, to avoid
"statement never reached" errors on the one below. */
internal_a.magic = NMAGIC; /* Assume separate i/d. */
#endif
-#ifdef MAXQ20MAGIC
-#define __A_MAGIC_SET__
- internal_a.magic = MAXQ20MAGIC;
-#endif
-
#ifndef __A_MAGIC_SET__
#include "Your aouthdr magic number is not being set!"
#else
# Catch obsolete configurations.
case $targ in
- maxq-*-coff | \
null)
if test "x$enable_obsolete" != xyes; then
echo "*** Configuration $targ is obsolete." >&2
m68*-apollo-* | \
m68*-bull-sysv* | \
m68*-*-rtemscoff* | \
+ maxq-*-coff | \
i960-*-rtems* | \
or32-*-rtems* | \
m68*-*-lynxos* | \
m6812*|m68hc12*) targ_archs="bfd_m68hc12_arch bfd_m68hc11_arch" ;;
m68*) targ_archs=bfd_m68k_arch ;;
m88*) targ_archs=bfd_m88k_arch ;;
-maxq*) targ_archs=bfd_maxq_arch ;;
microblaze*) targ_archs=bfd_microblaze_arch ;;
mips*) targ_archs=bfd_mips_arch ;;
or32*) targ_archs=bfd_or32_arch ;;
targ_underscore=yes
;;
- maxq-*-coff)
- targ_defvec=maxqcoff_vec
- ;;
-
mcore-*-elf)
targ_defvec=bfd_elf32_mcore_big_vec
targ_selvecs="bfd_elf32_mcore_big_vec bfd_elf32_mcore_little_vec"
ac_fn_c_check_decl ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $2 is declared" >&5
-$as_echo_n "checking whether $2 is declared... " >&6; }
+ as_decl_name=`echo $2|sed 's/ *(.*//'`
+ as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
+$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
$as_echo_n "(cached) " >&6
else
int
main ()
{
-#ifndef $2
- (void) $2;
+#ifndef $as_decl_name
+#ifdef __cplusplus
+ (void) $as_decl_use;
+#else
+ (void) $as_decl_name;
+#endif
#endif
;
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 11409 "configure"
+#line 11415 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 11515 "configure"
+#line 11521 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
m88kbcs_vec) tb="$tb coff-m88k.lo" ;;
m88kmach3_vec) tb="$tb m88kmach3.lo aout32.lo" ;;
m88kopenbsd_vec) tb="$tb m88kopenbsd.lo aout32.lo" ;;
- maxqcoff_vec) tb="$tb coff-maxq.lo" ;;
mach_o_be_vec) tb="$tb mach-o.lo" ;;
mach_o_le_vec) tb="$tb mach-o.lo" ;;
mach_o_fat_vec) tb="$tb mach-o.lo" ;;
m88kbcs_vec) tb="$tb coff-m88k.lo" ;;
m88kmach3_vec) tb="$tb m88kmach3.lo aout32.lo" ;;
m88kopenbsd_vec) tb="$tb m88kopenbsd.lo aout32.lo" ;;
- maxqcoff_vec) tb="$tb coff-maxq.lo" ;;
mach_o_be_vec) tb="$tb mach-o.lo" ;;
mach_o_le_vec) tb="$tb mach-o.lo" ;;
mach_o_fat_vec) tb="$tb mach-o.lo" ;;
+++ /dev/null
-/* BFD support for the MAXQ20/10 architecture.
- Copyright 2004, 2005, 2007 Free Software Foundation, Inc.
-
- Written by Vineet Sharma(vineets@noida.hcltech.com)
- Inderpreet Singh(inderpreetb@noida.hcltech.com)
-
- This file is part of BFD, the Binary File Descriptor library.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
- MA 02110-1301, USA. */
-
-#include "sysdep.h"
-#include "bfd.h"
-#include "libbfd.h"
-
-/* MAXQ Archtecture info. */
-static const bfd_arch_info_type bfd_maxq10_arch =
-{
- 16, /* 16 bits in a word. */
- 16, /* 16 bits in an address. */
- 8, /* 16 bits in a byte. */
- bfd_arch_maxq, /* Architecture number. */
- bfd_mach_maxq10, /* Machine number. */
- "maxq", /* Architecture name. */
- "maxq10", /* Machine name. */
- 0, /* Section align power. */
- FALSE, /* Not the default machine. */
- bfd_default_compatible,
- bfd_default_scan,
- NULL
-};
-
-
-const bfd_arch_info_type bfd_maxq_arch =
-{
- 16, /* 16 bits in a word. */
- 16, /* 16 bits in an address. */
- 8, /* 16 bits in a byte. */
- bfd_arch_maxq, /* Architecture number. */
- bfd_mach_maxq20, /* Machine number. */
- "maxq", /* Architecture name. */
- "maxq20", /* Machine name. */
- 0, /* Section align power. */
- TRUE, /* This is the default machine. */
- bfd_default_compatible,
- bfd_default_scan,
- & bfd_maxq10_arch
-};
(bfd *, struct bfd_link_info *);
bfd_byte *bfd_generic_get_relocated_section_contents
- (bfd *,
- struct bfd_link_info *,
- struct bfd_link_order *,
- bfd_byte *,
- bfd_boolean,
- asymbol **);
+ (bfd *abfd,
+ struct bfd_link_info *link_info,
+ struct bfd_link_order *link_order,
+ bfd_byte *data,
+ bfd_boolean relocatable,
+ asymbol **symbols);
/* Extracted from archures.c. */
extern const bfd_arch_info_type bfd_default_arch_struct;
coff-i960.c
coff-m68k.c
coff-m88k.c
-coff-maxq.c
coff-mips.c
coff-or32.c
coff-rs6000.c
cpu-m68hc12.c
cpu-m68k.c
cpu-m88k.c
-cpu-maxq.c
cpu-mcore.c
cpu-mep.c
cpu-microblaze.c
cpu-plugin.c
cpu-powerpc.c
cpu-rs6000.c
+cpu-rx.c
cpu-s390.c
cpu-score.c
cpu-sh.c
cpu-tic30.c
cpu-tic4x.c
cpu-tic54x.c
+cpu-tic6x.c
cpu-tic80.c
cpu-v850.c
cpu-vax.c
elf32-or32.c
elf32-pj.c
elf32-ppc.c
+elf32-rx.c
elf32-s390.c
elf32-score.c
elf32-score7.c
elf32-sh64.c
elf32-sparc.c
elf32-spu.c
+elf32-tic6x.c
elf32-v850.c
elf32-vax.c
elf32-xc16x.c
m88kmach3.c
m88kopenbsd.c
mach-o-i386.c
+mach-o-x86-64.c
mach-o.c
mach-o.h
merge.c
verilog.c
versados.c
version.h
-vms-gsd.c
-vms-hdr.c
+vms-alpha.c
+vms-lib.c
vms-misc.c
-vms-tir.c
-vms.c
vms.h
xcoff-target.h
xcofflink.c
extern const bfd_target mach_o_fat_vec;
extern const bfd_target mach_o_i386_vec;
extern const bfd_target mach_o_x86_64_vec;
-extern const bfd_target maxqcoff_vec;
extern const bfd_target mcore_pe_big_vec;
extern const bfd_target mcore_pe_little_vec;
extern const bfd_target mcore_pei_big_vec;
#ifdef BFD64
&mach_o_x86_64_vec,
#endif
- &maxqcoff_vec,
&mcore_pe_big_vec,
&mcore_pe_little_vec,
&mcore_pei_big_vec,
+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * configure: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
2010-06-27 Alan Modra <amodra@gmail.com>
* resbin.c (res_to_bin_accelerator): Delete set but unused variables.
ac_fn_c_check_decl ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $2 is declared" >&5
-$as_echo_n "checking whether $2 is declared... " >&6; }
+ as_decl_name=`echo $2|sed 's/ *(.*//'`
+ as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
+$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
$as_echo_n "(cached) " >&6
else
int
main ()
{
-#ifndef $2
- (void) $2;
+#ifndef $as_decl_name
+#ifdef __cplusplus
+ (void) $as_decl_use;
+#else
+ (void) $as_decl_name;
+#endif
#endif
;
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 11203 "configure"
+#line 11209 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 11309 "configure"
+#line 11315 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
dllwrap.c
dwarf.c
dwarf.h
+elfedit.c
emul_aix.c
emul_vanilla.c
filemode.c
+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * config/tc-maxq.h: Delete file.
+ * config/tc-maxq.c: Delete file.
+ * Makefile.am: Remove references to maxq.
+ * configure.tgt: Likewise.
+ * config/obj-coff.h: Likewise.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
2010-06-28 Alan Modra <amodra@gmail.com>
* config/obj-evax.h (S_SET_OTHER, S_SET_TYPE, S_SET_DESC): Don't define.
config/tc-m32r.c \
config/tc-m68hc11.c \
config/tc-m68k.c \
- config/tc-maxq.c \
config/tc-mcore.c \
config/tc-mep.c \
config/tc-microblaze.c \
config/tc-m32r.h \
config/tc-m68hc11.h \
config/tc-m68k.h \
- config/tc-maxq.h \
config/tc-mcore.h \
config/tc-mep.h \
config/tc-microblaze.h \
config/tc-m32r.c \
config/tc-m68hc11.c \
config/tc-m68k.c \
- config/tc-maxq.c \
config/tc-mcore.c \
config/tc-mep.c \
config/tc-microblaze.c \
config/tc-m32r.h \
config/tc-m68hc11.h \
config/tc-m68k.h \
- config/tc-maxq.h \
config/tc-mcore.h \
config/tc-mep.h \
config/tc-microblaze.h \
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-m32r.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-m68hc11.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-m68k.Po@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-maxq.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-mcore.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-mep.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-microblaze.Po@am__quote@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-m68k.obj `if test -f 'config/tc-m68k.c'; then $(CYGPATH_W) 'config/tc-m68k.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-m68k.c'; fi`
-tc-maxq.o: config/tc-maxq.c
-@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-maxq.o -MD -MP -MF $(DEPDIR)/tc-maxq.Tpo -c -o tc-maxq.o `test -f 'config/tc-maxq.c' || echo '$(srcdir)/'`config/tc-maxq.c
-@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-maxq.Tpo $(DEPDIR)/tc-maxq.Po
-@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-maxq.c' object='tc-maxq.o' libtool=no @AMDEPBACKSLASH@
-@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-maxq.o `test -f 'config/tc-maxq.c' || echo '$(srcdir)/'`config/tc-maxq.c
-
-tc-maxq.obj: config/tc-maxq.c
-@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-maxq.obj -MD -MP -MF $(DEPDIR)/tc-maxq.Tpo -c -o tc-maxq.obj `if test -f 'config/tc-maxq.c'; then $(CYGPATH_W) 'config/tc-maxq.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-maxq.c'; fi`
-@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-maxq.Tpo $(DEPDIR)/tc-maxq.Po
-@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-maxq.c' object='tc-maxq.obj' libtool=no @AMDEPBACKSLASH@
-@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-maxq.obj `if test -f 'config/tc-maxq.c'; then $(CYGPATH_W) 'config/tc-maxq.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-maxq.c'; fi`
-
tc-mcore.o: config/tc-mcore.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-mcore.o -MD -MP -MF $(DEPDIR)/tc-mcore.Tpo -c -o tc-mcore.o `test -f 'config/tc-mcore.c' || echo '$(srcdir)/'`config/tc-mcore.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-mcore.Tpo $(DEPDIR)/tc-mcore.Po
#define TARGET_FORMAT "coff-h8500"
#endif
-#ifdef TC_MAXQ20
-#include "coff/maxq.h"
-#define TARGET_FORMAT "coff-maxq"
-#endif
-
#ifdef TC_SH
#ifdef TE_PE
+++ /dev/null
-/* tc-maxq.c -- assembler code for a MAXQ chip.
-
- Copyright 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
-
- Contributed by HCL Technologies Pvt. Ltd.
-
- Author: Vineet Sharma(vineets@noida.hcltech.com) Inderpreet
- S.(inderpreetb@noida.hcltech.com)
-
- This file is part of GAS.
-
- GAS is free software; you can redistribute it and/or modify it under the
- terms of the GNU General Public License as published by the Free Software
- Foundation; either version 3, or (at your option) any later version.
-
- GAS is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
- details.
-
- You should have received a copy of the GNU General Public License along
- with GAS; see the file COPYING. If not, write to the Free Software
- Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-
-#include "as.h"
-#include "safe-ctype.h"
-#include "subsegs.h"
-#include "dwarf2dbg.h"
-#include "tc-maxq.h"
-#include "opcode/maxq.h"
-#include "ctype.h"
-
-#ifndef MAXQ10S
-#define MAXQ10S 1
-#endif
-
-#ifndef DEFAULT_ARCH
-#define DEFAULT_ARCH "MAXQ20"
-#endif
-
-#ifndef MAX_OPERANDS
-#define MAX_OPERANDS 2
-#endif
-
-#ifndef MAX_MNEM_SIZE
-#define MAX_MNEM_SIZE 8
-#endif
-
-#ifndef END_OF_INSN
-#define END_OF_INSN '\0'
-#endif
-
-#ifndef IMMEDIATE_PREFIX
-#define IMMEDIATE_PREFIX '#'
-#endif
-
-#ifndef MAX_REG_NAME_SIZE
-#define MAX_REG_NAME_SIZE 4
-#endif
-
-#ifndef MAX_MEM_NAME_SIZE
-#define MAX_MEM_NAME_SIZE 9
-#endif
-
-/* opcode for PFX[0]. */
-#define PFX0 0x0b
-
-/* Set default to MAXQ20. */
-unsigned int max_version = bfd_mach_maxq20;
-
-const char *default_arch = DEFAULT_ARCH;
-
-/* Type of the operand: Register,Immediate,Memory access,flag or bit. */
-
-union _maxq20_op
-{
- const reg_entry * reg;
- char imms; /* This is to store the immediate value operand. */
- expressionS * disps;
- symbolS * data;
- const mem_access * mem;
- int flag;
- const reg_bit * r_bit;
-};
-
-typedef union _maxq20_op maxq20_opcode;
-
-/* For handling optional L/S in Maxq20. */
-
-/* Exposed For Linker - maps indirectly to the liker relocations. */
-#define LONG_PREFIX MAXQ_LONGJUMP /* BFD_RELOC_16 */
-#define SHORT_PREFIX MAXQ_SHORTJUMP /* BFD_RELOC_16_PCREL_S2 */
-#define ABSOLUTE_ADDR_FOR_DATA MAXQ_INTERSEGMENT
-
-#define NO_PREFIX 0
-#define EXPLICT_LONG_PREFIX 14
-
-/* The main instruction structure containing fields to describe instrn */
-typedef struct _maxq20_insn
-{
- /* The opcode information for the MAXQ20 */
- MAXQ20_OPCODE_INFO op;
-
- /* The number of operands */
- unsigned int operands;
-
- /* Number of different types of operands - Comments can be removed if reqd.
- */
- unsigned int reg_operands, mem_operands, disp_operands, data_operands;
- unsigned int imm_operands, imm_bit_operands, bit_operands, flag_operands;
-
- /* Types of the individual operands */
- UNKNOWN_OP types[MAX_OPERANDS];
-
- /* Relocation type for operand : to be investigated into */
- int reloc[MAX_OPERANDS];
-
- /* Complete information of the Operands */
- maxq20_opcode maxq20_op[MAX_OPERANDS];
-
- /* Choice of prefix register whenever needed */
- int prefix;
-
- /* Optional Prefix for Instructions like LJUMP, SJUMP etc */
- unsigned char Instr_Prefix;
-
- /* 16 bit Instruction word */
- unsigned char instr[2];
-}
-maxq20_insn;
-
-/* Definitions of all possible characters that can start an operand. */
-const char *extra_symbol_chars = "@(#";
-
-/* Special Character that would start a comment. */
-const char comment_chars[] = ";";
-
-/* Starts a comment when it appears at the start of a line. */
-const char line_comment_chars[] = ";#";
-
-const char line_separator_chars[] = ""; /* originally may b by sudeep "\n". */
-
-/* The following are used for option processing. */
-
-/* This is added to the mach independent string passed to getopt. */
-const char *md_shortopts = "q";
-
-/* Characters for exponent and floating point. */
-const char EXP_CHARS[] = "eE";
-const char FLT_CHARS[] = "";
-
-/* This is for the machine dependent option handling. */
-#define OPTION_EB (OPTION_MD_BASE + 0)
-#define OPTION_EL (OPTION_MD_BASE + 1)
-#define MAXQ_10 (OPTION_MD_BASE + 2)
-#define MAXQ_20 (OPTION_MD_BASE + 3)
-
-struct option md_longopts[] =
-{
- {"MAXQ10", no_argument, NULL, MAXQ_10},
- {"MAXQ20", no_argument, NULL, MAXQ_20},
- {NULL, no_argument, NULL, 0}
-};
-size_t md_longopts_size = sizeof (md_longopts);
-
-/* md_undefined_symbol We have no need for this function. */
-
-symbolS *
-md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
-{
- return NULL;
-}
-
-static void
-maxq_target (int target)
-{
- max_version = target;
- bfd_set_arch_mach (stdoutput, bfd_arch_maxq, max_version);
-}
-
-int
-md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
-{
- /* Any options support will be added onto this switch case. */
- switch (c)
- {
- case MAXQ_10:
- max_version = bfd_mach_maxq10;
- break;
- case MAXQ_20:
- max_version = bfd_mach_maxq20;
- break;
-
- default:
- return 0;
- }
-
- return 1;
-}
-
-/* When a usage message is printed, this function is called and
- it prints a description of the machine specific options. */
-
-void
-md_show_usage (FILE * stream)
-{
- /* Over here we will fill the description of the machine specific options. */
-
- fprintf (stream, _(" MAXQ-specific assembler options:\n"));
-
- fprintf (stream, _("\
- -MAXQ20 generate obj for MAXQ20(default)\n\
- -MAXQ10 generate obj for MAXQ10\n\
- "));
-}
-
-unsigned long
-maxq20_mach (void)
-{
- if (!(strcmp (default_arch, "MAXQ20")))
- return 0;
-
- as_fatal (_("Unknown architecture"));
- return 1;
-}
-
-arelent *
-tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
-{
- arelent *rel;
- bfd_reloc_code_real_type code;
-
- switch (fixp->fx_r_type)
- {
- case MAXQ_INTERSEGMENT:
- case MAXQ_LONGJUMP:
- case BFD_RELOC_16_PCREL_S2:
- code = fixp->fx_r_type;
- break;
-
- case 0:
- default:
- switch (fixp->fx_size)
- {
- default:
- as_bad_where (fixp->fx_file, fixp->fx_line,
- _("can not do %d byte relocation"), fixp->fx_size);
- code = BFD_RELOC_32;
- break;
-
- case 1:
- code = BFD_RELOC_8;
- break;
- case 2:
- code = BFD_RELOC_16;
- break;
- case 4:
- code = BFD_RELOC_32;
- break;
- }
- }
-
- rel = xmalloc (sizeof (arelent));
- rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
- *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
-
- rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
- rel->addend = fixp->fx_addnumber;
- rel->howto = bfd_reloc_type_lookup (stdoutput, code);
-
- if (rel->howto == NULL)
- {
- as_bad_where (fixp->fx_file, fixp->fx_line,
- _("cannot represent relocation type %s"),
- bfd_get_reloc_code_name (code));
-
- /* Set howto to a garbage value so that we can keep going. */
- rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
- gas_assert (rel->howto != NULL);
- }
-
- return rel;
-}
-
-/* md_estimate_size_before_relax()
-
- Called just before relax() for rs_machine_dependent frags. The MAXQ
- assembler uses these frags to handle 16 bit absolute jumps which require a
- prefix instruction to be inserted. Any symbol that is now undefined will
- not become defined. Return the correct fr_subtype in the frag. Return the
- initial "guess for variable size of frag"(This will be eiter 2 or 0) to
- caller. The guess is actually the growth beyond the fixed part. Whatever
- we do to grow the fixed or variable part contributes to our returned
- value. */
-
-int
-md_estimate_size_before_relax (fragS *fragP, segT segment)
-{
- /* Check whether the symbol has been resolved or not.
- Otherwise we will have to generate a fixup. */
- if ((S_GET_SEGMENT (fragP->fr_symbol) != segment)
- || fragP->fr_subtype == EXPLICT_LONG_PREFIX)
- {
- RELOC_ENUM reloc_type;
- unsigned char *opcode;
- int old_fr_fix;
-
- /* Now this symbol has not been defined in this file.
- Hence we will have to create a fixup. */
- int size = 2;
-
- /* This is for the prefix instruction. */
-
- if (fragP->fr_subtype == EXPLICT_LONG_PREFIX)
- fragP->fr_subtype = LONG_PREFIX;
-
- if (S_GET_SEGMENT (fragP->fr_symbol) != segment
- && ((!(fragP->fr_subtype) == EXPLICT_LONG_PREFIX)))
- fragP->fr_subtype = ABSOLUTE_ADDR_FOR_DATA;
-
- reloc_type =
- (fragP->fr_subtype ? fragP->fr_subtype : ABSOLUTE_ADDR_FOR_DATA);
-
- fragP->fr_subtype = reloc_type;
-
- if (reloc_type == SHORT_PREFIX)
- size = 0;
- old_fr_fix = fragP->fr_fix;
- opcode = (unsigned char *) fragP->fr_opcode;
-
- fragP->fr_fix += (size);
-
- fix_new (fragP, old_fr_fix - 2, size + 2,
- fragP->fr_symbol, fragP->fr_offset, 0, reloc_type);
- frag_wane (fragP);
- return fragP->fr_fix - old_fr_fix;
- }
-
- if (fragP->fr_subtype == SHORT_PREFIX)
- {
- fragP->fr_subtype = SHORT_PREFIX;
- return 0;
- }
-
- if (fragP->fr_subtype == NO_PREFIX || fragP->fr_subtype == LONG_PREFIX)
- {
- unsigned long instr;
- unsigned long call_addr;
- long diff;
- fragS *f;
- diff = diff ^ diff;;
- call_addr = call_addr ^ call_addr;
- instr = 0;
- f = NULL;
-
- /* segment_info_type *seginfo = seg_info (segment); */
- instr = fragP->fr_address + fragP->fr_fix - 2;
-
- /* This is the offset if it is a PC relative jump. */
- call_addr = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
-
- /* PC stores the value of the next instruction. */
- diff = (call_addr - instr) - 1;
-
- if (diff >= (-128 * 2) && diff <= (2 * 127))
- {
- /* Now as offset is an 8 bit value, we will pass
- that to the jump instruction directly. */
- fragP->fr_subtype = NO_PREFIX;
- return 0;
- }
-
- fragP->fr_subtype = LONG_PREFIX;
- return 2;
- }
-
- as_fatal (_("Illegal Reloc type in md_estimate_size_before_relax for line : %d"),
- frag_now->fr_line);
- return 0;
-}
-
-char *
-md_atof (int type, char * litP, int * sizeP)
-{
- if (type == 'd')
- /* The size of Double has been changed to 2 words ie 32 bits. */
- type = 'f';
- return ieee_md_atof (type, litP, sizeP, FALSE);
-}
-
-void
-maxq20_cons_fix_new (fragS * frag, unsigned int off, unsigned int len,
- expressionS * exp)
-{
- int r = 0;
-
- switch (len)
- {
- case 2:
- r = MAXQ_WORDDATA; /* Word+n */
- break;
- case 4:
- r = MAXQ_LONGDATA; /* Long+n */
- break;
- }
-
- fix_new_exp (frag, off, len, exp, 0, r);
- return;
-}
-
-/* GAS will call this for every rs_machine_dependent fragment. The
- instruction is completed using the data from the relaxation pass. It may
- also create any necessary relocations. */
-void
-md_convert_frag (bfd * headers ATTRIBUTE_UNUSED,
- segT seg ATTRIBUTE_UNUSED,
- fragS * fragP)
-{
- char *opcode;
- offsetT target_address;
- offsetT opcode_address;
- offsetT displacement_from_opcode_start;
- int address;
-
- opcode = fragP->fr_opcode;
- address = 0;
- target_address = opcode_address = displacement_from_opcode_start = 0;
-
- target_address =
- (S_GET_VALUE (fragP->fr_symbol) / MAXQ_OCTETS_PER_BYTE) +
- (fragP->fr_offset / MAXQ_OCTETS_PER_BYTE);
-
- opcode_address =
- (fragP->fr_address / MAXQ_OCTETS_PER_BYTE) +
- ((fragP->fr_fix - 2) / MAXQ_OCTETS_PER_BYTE);
-
- /* PC points to the next Instruction. */
- displacement_from_opcode_start = ((target_address - opcode_address) - 1);
-
- if ((displacement_from_opcode_start >= -128
- && displacement_from_opcode_start <= 127)
- && (fragP->fr_subtype == SHORT_PREFIX
- || fragP->fr_subtype == NO_PREFIX))
- {
- /* Its a displacement. */
- *opcode = (char) displacement_from_opcode_start;
- }
- else
- {
- /* Its an absolute 16 bit jump. Now we have to
- load the prefix operator with the upper 8 bits. */
- if (fragP->fr_subtype == SHORT_PREFIX)
- {
- as_bad (_("Cant make long jump/call into short jump/call : %d"),
- fragP->fr_line);
- return;
- }
-
- /* Check whether the symbol has been resolved or not.
- Otherwise we will have to generate a fixup. */
-
- if (fragP->fr_subtype != SHORT_PREFIX)
- {
- RELOC_ENUM reloc_type;
- int old_fr_fix;
- int size = 2;
-
- /* Now this is a basolute jump/call.
- Hence we will have to create a fixup. */
- if (fragP->fr_subtype == NO_PREFIX)
- fragP->fr_subtype = LONG_PREFIX;
-
- reloc_type =
- (fragP->fr_subtype ? fragP->fr_subtype : LONG_PREFIX);
-
- if (reloc_type == 1)
- size = 0;
- old_fr_fix = fragP->fr_fix;
-
- fragP->fr_fix += (size);
-
- fix_new (fragP, old_fr_fix - 2, size + 2,
- fragP->fr_symbol, fragP->fr_offset, 0, reloc_type);
- frag_wane (fragP);
- }
- }
-}
-
-long
-md_pcrel_from (fixS *fixP)
-{
- return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
-}
-
-/* Writes the val to the buf, where n is the nuumber of bytes to write. */
-
-void
-maxq_number_to_chars (char *buf, valueT val, int n)
-{
- if (target_big_endian)
- number_to_chars_bigendian (buf, val, n);
- else
- number_to_chars_littleendian (buf, val, n);
-}
-
-/* GAS will call this for each fixup. It's main objective is to store the
- correct value in the object file. 'fixup_segment' performs the generic
- overflow check on the 'valueT *val' argument after md_apply_fix returns.
- If the overflow check is relevant for the target machine, then
- 'md_apply_fix' should modify 'valueT *val', typically to the value stored
- in the object file (not to be done in MAXQ). */
-
-void
-md_apply_fix (fixS *fixP, valueT *valT, segT seg ATTRIBUTE_UNUSED)
-{
- char *p = fixP->fx_frag->fr_literal + fixP->fx_where;
- char *frag_to_fix_at =
- fixP->fx_frag->fr_literal + fixP->fx_frag->fr_fix - 2;
-
- if (fixP)
- {
- if (fixP->fx_frag && valT)
- {
- /* If the relaxation substate is not defined we make it equal
- to the kind of relocation the fixup is generated for. */
- if (!fixP->fx_frag->fr_subtype)
- fixP->fx_frag->fr_subtype = fixP->fx_r_type;
-
- /* For any instruction in which either we have specified an
- absolute address or it is a long jump we need to add a PFX0
- instruction to it. In this case as the instruction has already
- being written at 'fx_where' in the frag we copy it at the end of
- the frag(which is where the relocation was generated) as when
- the relocation is generated the frag is grown by 2 type, this is
- where we copy the contents of fx_where and add a pfx0 at
- fx_where. */
- if ((fixP->fx_frag->fr_subtype == ABSOLUTE_ADDR_FOR_DATA)
- || (fixP->fx_frag->fr_subtype == LONG_PREFIX))
- {
- *(frag_to_fix_at + 1) = *(p + 1);
- maxq_number_to_chars (p + 1, PFX0, 1);
- }
-
- /* Remember value for tc_gen_reloc. */
- fixP->fx_addnumber = *valT;
- }
-
- /* Some fixups generated by GAS which gets resovled before this this
- func. is called need to be wriiten to the frag as here we are going
- to go away with the relocations fx_done=1. */
- if (fixP->fx_addsy == NULL)
- {
- maxq_number_to_chars (p, *valT, fixP->fx_size);
- fixP->fx_addnumber = *valT;
- fixP->fx_done = 1;
- }
- }
-}
-
-/* Tables for lexical analysis. */
-static char mnemonic_chars[256];
-static char register_chars[256];
-static char operand_chars[256];
-static char identifier_chars[256];
-static char digit_chars[256];
-
-/* Lexical Macros. */
-#define is_mnemonic_char(x) (mnemonic_chars[(unsigned char)(x)])
-#define is_register_char(x) (register_chars[(unsigned char)(x)])
-#define is_operand_char(x) (operand_chars[(unsigned char)(x)])
-#define is_space_char(x) (x==' ')
-#define is_identifier_char(x) (identifier_chars[(unsigned char)(x)])
-#define is_digit_char(x) (identifier_chars[(unsigned char)(x)])
-
-/* Special characters for operands. */
-static char operand_special_chars[] = "[]@.-+";
-
-/* md_assemble() will always leave the instruction passed to it unaltered.
- To do this we store the instruction in a special stack. */
-static char save_stack[32];
-static char *save_stack_p;
-
-#define END_STRING_AND_SAVE(s) \
- do \
- { \
- *save_stack_p++ = *(s); \
- *s = '\0'; \
- } \
- while (0)
-
-#define RESTORE_END_STRING(s) \
- do \
- { \
- *(s) = *(--save_stack_p); \
- } \
- while (0)
-
-/* The instruction we are assembling. */
-static maxq20_insn i;
-
-/* The current template. */
-static MAXQ20_OPCODES *current_templates;
-
-/* The displacement operand if any. */
-static expressionS disp_expressions;
-
-/* Current Operand we are working on (0:1st operand,1:2nd operand). */
-static int this_operand;
-
-/* The prefix instruction if used. */
-static char PFX_INSN[2];
-static char INSERT_BUFFER[2];
-
-/* For interface with expression() ????? */
-extern char *input_line_pointer;
-
-/* The HASH Tables: */
-
-/* Operand Hash Table. */
-static struct hash_control *op_hash;
-
-/* Register Hash Table. */
-static struct hash_control *reg_hash;
-
-/* Memory reference Hash Table. */
-static struct hash_control *mem_hash;
-
-/* Bit hash table. */
-static struct hash_control *bit_hash;
-
-/* Memory Access syntax table. */
-static struct hash_control *mem_syntax_hash;
-
-/* This is a mapping from pseudo-op names to functions. */
-
-const pseudo_typeS md_pseudo_table[] =
-{
- {"int", cons, 2}, /* size of 'int' has been changed to 1 word
- (i.e) 16 bits. */
- {"maxq10", maxq_target, bfd_mach_maxq10},
- {"maxq20", maxq_target, bfd_mach_maxq20},
- {NULL, 0, 0},
-};
-
-#define SET_PFX_ARG(x) (PFX_INSN[1] = x)
-
-
-/* This function sets the PFX value corresponding to the specs. Source
- Destination Index Selection ---------------------------------- Write To|
- SourceRegRange | Dest Addr Range
- ------------------------------------------------------ PFX[0] | 0h-Fh |
- 0h-7h PFX[1] | 10h-1Fh | 0h-7h PFX[2] | 0h-Fh | 8h-Fh PFX[3] | 10h-1Fh |
- 8h-Fh PFX[4] | 0h-Fh | 10h-17h PFX[5] | 10h-1Fh | 10h-17h PFX[6] | 0h-Fh |
- 18h-1Fh PFX[7] | 0h-Fh | 18h-1Fh */
-
-static void
-set_prefix (void)
-{
- short int src_index = 0, dst_index = 0;
-
- if (i.operands == 0)
- return;
- if (i.operands == 1) /* Only SRC is Present */
- {
- if (i.types[0] == REG)
- {
- if (!strcmp (i.op.name, "POP") || !strcmp (i.op.name, "POPI"))
- {
- dst_index = i.maxq20_op[0].reg[0].Mod_index;
- src_index = 0x00;
- }
- else
- {
- src_index = i.maxq20_op[0].reg[0].Mod_index;
- dst_index = 0x00;
- }
- }
- }
-
- if (i.operands == 2)
- {
- if (i.types[0] == REG && i.types[1] == REG)
- {
- dst_index = i.maxq20_op[0].reg[0].Mod_index;
- src_index = i.maxq20_op[1].reg[0].Mod_index;
- }
- else if (i.types[0] != REG && i.types[1] == REG) /* DST is Absent */
- {
- src_index = i.maxq20_op[1].reg[0].Mod_index;
- dst_index = 0x00;
- }
- else if (i.types[0] == REG && i.types[1] != REG) /* Id SRC is Absent */
- {
- dst_index = i.maxq20_op[0].reg[0].Mod_index;
- src_index = 0x00;
- }
- else if (i.types[0] == BIT && i.maxq20_op[0].r_bit)
- {
- dst_index = i.maxq20_op[0].r_bit->reg->Mod_index;
- src_index = 0x00;
- }
-
- else if (i.types[1] == BIT && i.maxq20_op[1].r_bit)
- {
- dst_index = 0x00;
- src_index = i.maxq20_op[1].r_bit->reg->Mod_index;
- }
- }
-
- if (src_index >= 0x00 && src_index <= 0xF)
- {
- if (dst_index >= 0x00 && dst_index <= 0x07)
- /* Set PFX[0] */
- i.prefix = 0;
-
- else if (dst_index >= 0x08 && dst_index <= 0x0F)
- /* Set PFX[2] */
- i.prefix = 2;
-
- else if (dst_index >= 0x10 && dst_index <= 0x17)
- /* Set PFX[4] */
- i.prefix = 4;
-
- else if (dst_index >= 0x18 && dst_index <= 0x1F)
- /* Set PFX[6] */
- i.prefix = 6;
- }
- else if (src_index >= 0x10 && src_index <= 0x1F)
- {
- if (dst_index >= 0x00 && dst_index <= 0x07)
- /* Set PFX[1] */
- i.prefix = 1;
-
- else if (dst_index >= 0x08 && dst_index <= 0x0F)
- /* Set PFX[3] */
- i.prefix = 3;
-
- else if (dst_index >= 0x10 && dst_index <= 0x17)
- /* Set PFX[5] */
- i.prefix = 5;
-
- else if (dst_index >= 0x18 && dst_index <= 0x1F)
- /* Set PFX[7] */
- i.prefix = 7;
- }
-}
-
-static unsigned char
-is_a_LSinstr (const char *ln_pointer)
-{
- int i = 0;
-
- for (i = 0; LSInstr[i] != NULL; i++)
- if (!strcmp (LSInstr[i], ln_pointer))
- return 1;
-
- return 0;
-}
-
-static void
-LS_processing (const char *line)
-{
- if (is_a_LSinstr (line))
- {
- if ((line[0] == 'L') || (line[0] == 'l'))
- {
- i.prefix = 0;
- INSERT_BUFFER[0] = PFX0;
- i.Instr_Prefix = LONG_PREFIX;
- }
- else if ((line[0] == 'S') || (line[0] == 's'))
- i.Instr_Prefix = SHORT_PREFIX;
- else
- i.Instr_Prefix = NO_PREFIX;
- }
- else
- i.Instr_Prefix = LONG_PREFIX;
-}
-
-/* Separate mnemonics and the operands. */
-
-static char *
-parse_insn (char *line, char *mnemonic)
-{
- char *l = line;
- char *token_start = l;
- char *mnem_p;
- char temp[MAX_MNEM_SIZE];
- int ii = 0;
-
- memset (temp, END_OF_INSN, MAX_MNEM_SIZE);
- mnem_p = mnemonic;
-
- while ((*mnem_p = mnemonic_chars[(unsigned char) *l]) != 0)
- {
- ii++;
- mnem_p++;
- if (mnem_p >= mnemonic + MAX_MNEM_SIZE)
- {
- as_bad (_("no such instruction: `%s'"), token_start);
- return NULL;
- }
- l++;
- }
-
- if (!is_space_char (*l) && *l != END_OF_INSN)
- {
- as_bad (_("invalid character %s in mnemonic"), l);
- return NULL;
- }
-
- while (ii)
- {
- temp[ii - 1] = toupper ((char) mnemonic[ii - 1]);
- ii--;
- }
-
- LS_processing (temp);
-
- if (i.Instr_Prefix != 0 && is_a_LSinstr (temp))
- /* Skip the optional L-S. */
- memcpy (temp, temp + 1, MAX_MNEM_SIZE);
-
- /* Look up instruction (or prefix) via hash table. */
- current_templates = (MAXQ20_OPCODES *) hash_find (op_hash, temp);
-
- if (current_templates != NULL)
- return l;
-
- as_bad (_("no such instruction: `%s'"), token_start);
- return NULL;
-}
-
-/* Function to calculate x to the power of y.
- Just to avoid including the math libraries. */
-
-static int
-pwr (int x, int y)
-{
- int k, ans = 1;
-
- for (k = 0; k < y; k++)
- ans *= x;
-
- return ans;
-}
-
-static reg_entry *
-parse_reg_by_index (char *imm_start)
-{
- int k = 0, mid = 0, rid = 0, val = 0, j = 0;
- char temp[4] = { 0 };
- reg_entry *reg = NULL;
-
- do
- {
- if (isdigit (imm_start[k]))
- temp[k] = imm_start[k] - '0';
-
- else if (isalpha (imm_start[k])
- && (imm_start[k] = tolower (imm_start[k])) < 'g')
- temp[k] = 10 + (int) (imm_start[k] - 'a');
-
- else if (imm_start[k] == 'h')
- break;
-
- else if (imm_start[k] == END_OF_INSN)
- {
- imm_start[k] = 'd';
- break;
- }
-
- else
- return NULL; /* not a hex digit */
-
- k++;
- }
- while (imm_start[k] != '\n');
-
- switch (imm_start[k])
- {
- case 'h':
- for (j = 0; j < k; j++)
- val += temp[j] * pwr (16, k - j - 1);
- break;
-
- case 'd':
- for (j = 0; j < k; j++)
- {
- if (temp[j] > 9)
- return NULL; /* not a number */
-
- val += temp[j] * pwr (10, k - j - 1);
- break;
- }
- }
-
- /* Get the module and register id's. */
- mid = val & 0x0f;
- rid = (val >> 4) & 0x0f;
-
- if (mid < 6)
- {
- /* Search the pheripheral reg table. */
- for (j = 0; j < num_of_reg; j++)
- {
- if (new_reg_table[j].opcode == val)
- {
- reg = (reg_entry *) & new_reg_table[j];
- break;
- }
- }
- }
-
- else
- {
- /* Search the system register table. */
- j = 0;
-
- while (system_reg_table[j].reg_name != NULL)
- {
- if (system_reg_table[j].opcode == val)
- {
- reg = (reg_entry *) & system_reg_table[j];
- break;
- }
- j++;
- }
- }
-
- if (reg == NULL)
- {
- as_bad (_("Invalid register value %s"), imm_start);
- return reg;
- }
-
-#if CHANGE_PFX
- if (this_operand == 0 && reg != NULL)
- {
- if (reg->Mod_index > 7)
- i.prefix = 2;
- else
- i.prefix = 0;
- }
-#endif
- return (reg_entry *) reg;
-}
-
-/* REG_STRING starts *before* REGISTER_PREFIX. */
-
-static reg_entry *
-parse_register (char *reg_string, char **end_op)
-{
- char *s = reg_string;
- char *p = NULL;
- char reg_name_given[MAX_REG_NAME_SIZE + 1];
- reg_entry *r = NULL;
-
- r = NULL;
- p = NULL;
-
- /* Skip possible REGISTER_PREFIX and possible whitespace. */
- if (is_space_char (*s))
- ++s;
-
- p = reg_name_given;
- while ((*p++ = register_chars[(unsigned char) *s]) != '\0')
- {
- if (p >= reg_name_given + MAX_REG_NAME_SIZE)
- return (reg_entry *) NULL;
- s++;
- }
-
- *end_op = s;
-
- r = (reg_entry *) hash_find (reg_hash, reg_name_given);
-
-#if CHANGE_PFX
- if (this_operand == 0 && r != NULL)
- {
- if (r->Mod_index > 7)
- i.prefix = 2;
- else
- i.prefix = 0;
- }
-#endif
- return r;
-}
-
-static reg_bit *
-parse_register_bit (char *reg_string, char **end_op)
-{
- const char *s = reg_string;
- short k = 0;
- char diff = 0;
- reg_bit *rb = NULL;
- reg_entry *r = NULL;
- bit_name *b = NULL;
- char temp_bitname[MAX_REG_NAME_SIZE + 2];
- char temp[MAX_REG_NAME_SIZE + 1];
-
- memset (&temp, '\0', (MAX_REG_NAME_SIZE + 1));
- memset (&temp_bitname, '\0', (MAX_REG_NAME_SIZE + 2));
-
- diff = 0;
- r = NULL;
- rb = NULL;
- rb = xmalloc (sizeof (reg_bit));
- rb->reg = xmalloc (sizeof (reg_entry));
- k = 0;
-
- /* For supporting bit names. */
- b = (bit_name *) hash_find (bit_hash, reg_string);
-
- if (b != NULL)
- {
- *end_op = reg_string + strlen (reg_string);
- strcpy (temp_bitname, b->reg_bit);
- s = temp_bitname;
- }
-
- if (strchr (s, '.'))
- {
- while (*s != '.')
- {
- if (*s == '\0')
- return NULL;
- temp[k] = *s++;
-
- k++;
- }
- temp[k] = '\0';
- }
-
- if ((r = parse_register (temp, end_op)) == NULL)
- return NULL;
-
- rb->reg = r;
-
- /* Skip the "." */
- s++;
-
- if (isdigit ((char) *s))
- rb->bit = atoi (s);
- else if (isalpha ((char) *s))
- {
- rb->bit = (char) *s - 'a';
- rb->bit += 10;
- if (rb->bit > 15)
- {
- as_bad (_("Invalid bit number : '%c'"), (char) *s);
- return NULL;
- }
- }
-
- if (b != NULL)
- diff = strlen (temp_bitname) - strlen (temp) - 1;
- else
- diff = strlen (reg_string) - strlen (temp) - 1;
-
- if (*(s + diff) != '\0')
- {
- as_bad (_("Illegal character after operand '%s'"), reg_string);
- return NULL;
- }
-
- return rb;
-}
-
-static void
-pfx_for_imm_val (int arg)
-{
- if (i.prefix == -1)
- return;
-
- if (i.prefix == 0 && arg == 0 && PFX_INSN[1] == 0 && !(i.data_operands))
- return;
-
- if (!(i.prefix < 0) && !(i.prefix > 7))
- PFX_INSN[0] = (i.prefix << 4) | PFX0;
-
- if (!PFX_INSN[1])
- PFX_INSN[1] = arg;
-
-}
-
-static int
-maxq20_immediate (char *imm_start)
-{
- int val = 0, val_pfx = 0;
- char sign_val = 0;
- int k = 0, j;
- int temp[4] = { 0 };
-
- imm_start++;
-
- if (imm_start[1] == '\0' && (imm_start[0] == '0' || imm_start[0] == '1')
- && (this_operand == 1 && ((i.types[0] == BIT || i.types[0] == FLAG))))
- {
- val = imm_start[0] - '0';
- i.imm_bit_operands++;
- i.types[this_operand] = IMMBIT;
- i.maxq20_op[this_operand].imms = (char) val;
-#if CHANGE_PFX
- if (i.prefix == 2)
- pfx_for_imm_val (0);
-#endif
- return 1;
- }
-
- /* Check For Sign Character. */
- sign_val = 0;
-
- do
- {
- if (imm_start[k] == '-' && k == 0)
- sign_val = -1;
-
- else if (imm_start[k] == '+' && k == 0)
- sign_val = 1;
-
- else if (isdigit (imm_start[k]))
- temp[k] = imm_start[k] - '0';
-
- else if (isalpha (imm_start[k])
- && (imm_start[k] = tolower (imm_start[k])) < 'g')
- temp[k] = 10 + (int) (imm_start[k] - 'a');
-
- else if (imm_start[k] == 'h')
- break;
-
- else if (imm_start[k] == '\0')
- {
- imm_start[k] = 'd';
- break;
- }
- else
- {
- as_bad (_("Invalid Character in immediate Value : %c"),
- imm_start[k]);
- return 0;
- }
- k++;
- }
- while (imm_start[k] != '\n');
-
- switch (imm_start[k])
- {
- case 'h':
- for (j = (sign_val ? 1 : 0); j < k; j++)
- val += temp[j] * pwr (16, k - j - 1);
- break;
-
- case 'd':
- for (j = (sign_val ? 1 : 0); j < k; j++)
- {
- if (temp[j] > 9)
- {
- as_bad (_("Invalid Character in immediate value : %c"),
- imm_start[j]);
- return 0;
- }
- val += temp[j] * pwr (10, k - j - 1);
- }
- }
-
- if (!sign_val)
- sign_val = 1;
-
- /* Now over here the value val stores the 8 bit/16 bit value. We will put a
- check if we are moving a 16 bit immediate value into an 8 bit register.
- In that case we will generate a warning and move only the lower 8 bits */
- if (val > 65535)
- {
- as_bad (_("Immediate value greater than 16 bits"));
- return 0;
- }
-
- val = val * sign_val;
-
- /* If it is a stack pointer and the value is greater than the maximum
- permissible size */
- if (this_operand == 1)
- {
- if ((val * sign_val) > MAX_STACK && i.types[0] == REG
- && !strcmp (i.maxq20_op[0].reg->reg_name, "SP"))
- {
- as_warn (_
- ("Attempt to move a value in the stack pointer greater than the size of the stack"));
- val = val & MAX_STACK;
- }
-
- /* Check the range for 8 bit registers. */
- else if (((val * sign_val) > 0xFF) && (i.types[0] == REG)
- && (i.maxq20_op[0].reg->rtype == Reg_8W))
- {
- as_warn (_
- ("Attempt to move 16 bit value into an 8 bit register.Truncating..\n"));
- val = val & 0xfe;
- }
-
- else if (((sign_val == -1) || (val > 0xFF)) && (i.types[0] == REG)
- && (i.maxq20_op[0].reg->rtype == Reg_8W))
- {
- val_pfx = val >> 8;
- val = ((val) & 0x00ff);
- SET_PFX_ARG (val_pfx);
- i.maxq20_op[this_operand].imms = (char) val;
- }
-
- else if ((val <= 0xff) && (i.types[0] == REG)
- && (i.maxq20_op[0].reg->rtype == Reg_8W))
- i.maxq20_op[this_operand].imms = (char) val;
-
-
- /* Check for 16 bit registers. */
- else if (((sign_val == -1) || val > 0xFE) && i.types[0] == REG
- && i.maxq20_op[0].reg->rtype == Reg_16W)
- {
- /* Add PFX for any negative value -> 16bit register. */
- val_pfx = val >> 8;
- val = ((val) & 0x00ff);
- SET_PFX_ARG (val_pfx);
- i.maxq20_op[this_operand].imms = (char) val;
- }
-
- else if (val < 0xFF && i.types[0] == REG
- && i.maxq20_op[0].reg->rtype == Reg_16W)
- {
- i.maxq20_op[this_operand].imms = (char) val;
- }
-
- /* All the immediate memory access - no PFX. */
- else if (i.types[0] == MEM)
- {
- if ((sign_val == -1) || val > 0xFE)
- {
- val_pfx = val >> 8;
- val = ((val) & 0x00ff);
- SET_PFX_ARG (val_pfx);
- i.maxq20_op[this_operand].imms = (char) val;
- }
- else
- i.maxq20_op[this_operand].imms = (char) val;
- }
-
- /* Special handling for immediate jumps like jump nz, #03h etc. */
- else if (val < 0xFF && i.types[0] == FLAG)
- i.maxq20_op[this_operand].imms = (char) val;
-
- else if ((((sign_val == -1) || val > 0xFE)) && i.types[0] == FLAG)
- {
- val_pfx = val >> 8;
- val = ((val) & 0x00ff);
- SET_PFX_ARG (val_pfx);
- i.maxq20_op[this_operand].imms = (char) val;
- }
- else
- {
- as_bad (_("Invalid immediate move operation"));
- return 0;
- }
- }
- else
- {
- /* All the instruction with operation on ACC: like ADD src, etc. */
- if ((sign_val == -1) || val > 0xFE)
- {
- val_pfx = val >> 8;
- val = ((val) & 0x00ff);
- SET_PFX_ARG (val_pfx);
- i.maxq20_op[this_operand].imms = (char) val;
- }
- else
- i.maxq20_op[this_operand].imms = (char) val;
- }
-
- i.imm_operands++;
- return 1;
-}
-
-static int
-extract_int_val (const char *imm_start)
-{
- int k, j, val;
- char sign_val;
- int temp[4];
-
- k = 0;
- j = 0;
- val = 0;
- sign_val = 0;
- do
- {
- if (imm_start[k] == '-' && k == 0)
- sign_val = -1;
-
- else if (imm_start[k] == '+' && k == 0)
- sign_val = 1;
-
- else if (isdigit (imm_start[k]))
- temp[k] = imm_start[k] - '0';
-
- else if (isalpha (imm_start[k]) && (tolower (imm_start[k])) < 'g')
- temp[k] = 10 + (int) (tolower (imm_start[k]) - 'a');
-
- else if (tolower (imm_start[k]) == 'h')
- break;
-
- else if ((imm_start[k] == '\0') || (imm_start[k] == ']'))
- /* imm_start[k]='d'; */
- break;
-
- else
- {
- as_bad (_("Invalid Character in immediate Value : %c"),
- imm_start[k]);
- return 0;
- }
- k++;
- }
- while (imm_start[k] != '\n');
-
- switch (imm_start[k])
- {
- case 'h':
- for (j = (sign_val ? 1 : 0); j < k; j++)
- val += temp[j] * pwr (16, k - j - 1);
- break;
-
- default:
- for (j = (sign_val ? 1 : 0); j < k; j++)
- {
- if (temp[j] > 9)
- {
- as_bad (_("Invalid Character in immediate value : %c"),
- imm_start[j]);
- return 0;
- }
- val += temp[j] * pwr (10, k - j - 1);
- }
- }
-
- if (!sign_val)
- sign_val = 1;
-
- return val * sign_val;
-}
-
-static char
-check_for_parse (const char *line)
-{
- int val;
-
- if (*(line + 1) == '[')
- {
- do
- {
- line++;
- if ((*line == '-') || (*line == '+'))
- break;
- }
- while (!is_space_char (*line));
-
- if ((*line == '-') || (*line == '+'))
- val = extract_int_val (line);
- else
- val = extract_int_val (line + 1);
-
- INSERT_BUFFER[0] = 0x3E;
- INSERT_BUFFER[1] = val;
-
- return 1;
- }
-
- return 0;
-}
-
-static mem_access *
-maxq20_mem_access (char *mem_string, char **end_op)
-{
- char *s = mem_string;
- char *p;
- char mem_name_given[MAX_MEM_NAME_SIZE + 1];
- mem_access *m;
-
- m = NULL;
-
- /* Skip possible whitespace. */
- if (is_space_char (*s))
- ++s;
-
- p = mem_name_given;
- while ((*p++ = register_chars[(unsigned char) *s]) != '\0')
- {
- if (p >= mem_name_given + MAX_MEM_NAME_SIZE)
- return (mem_access *) NULL;
- s++;
- }
-
- *end_op = s;
-
- m = (mem_access *) hash_find (mem_hash, mem_name_given);
-
- return m;
-}
-
-/* This function checks whether the operand is a variable in the data segment
- and if so, it returns its symbol entry from the symbol table. */
-
-static symbolS *
-maxq20_data (char *op_string)
-{
- symbolS *symbolP;
- symbolP = symbol_find (op_string);
-
- if (symbolP != NULL
- && S_GET_SEGMENT (symbolP) != now_seg
- && S_GET_SEGMENT (symbolP) != bfd_und_section_ptr)
- {
- /* In case we do not want to always include the prefix instruction and
- let the loader handle the job or in case of a 8 bit addressing mode,
- we will just check for val_pfx to be equal to zero and then load the
- prefix instruction. Otherwise no prefix instruction needs to be
- loaded. */
- /* The prefix register will have to be loaded automatically as we have
- a 16 bit addressing field. */
- pfx_for_imm_val (0);
- return symbolP;
- }
-
- return NULL;
-}
-
-static int
-maxq20_displacement (char *disp_start, char *disp_end)
-{
- expressionS *exp;
- segT exp_seg = 0;
- char *save_input_line_pointer;
-#ifndef LEX_AT
- char *gotfree_input_line;
-#endif
-
- gotfree_input_line = NULL;
- exp = &disp_expressions;
- i.maxq20_op[this_operand].disps = exp;
- i.disp_operands++;
- save_input_line_pointer = input_line_pointer;
- input_line_pointer = disp_start;
-
- END_STRING_AND_SAVE (disp_end);
-
-#ifndef LEX_AT
- /* gotfree_input_line = lex_got (&i.reloc[this_operand], NULL); if
- (gotfree_input_line) input_line_pointer = gotfree_input_line; */
-#endif
- exp_seg = expression (exp);
-
- SKIP_WHITESPACE ();
- if (*input_line_pointer)
- as_bad (_("junk `%s' after expression"), input_line_pointer);
-#if GCC_ASM_O_HACK
- RESTORE_END_STRING (disp_end + 1);
-#endif
- RESTORE_END_STRING (disp_end);
- input_line_pointer = save_input_line_pointer;
-#ifndef LEX_AT
- if (gotfree_input_line)
- free (gotfree_input_line);
-#endif
- if (exp->X_op == O_absent || exp->X_op == O_big)
- {
- /* Missing or bad expr becomes absolute 0. */
- as_bad (_("missing or invalid displacement expression `%s' taken as 0"),
- disp_start);
- exp->X_op = O_constant;
- exp->X_add_number = 0;
- exp->X_add_symbol = (symbolS *) 0;
- exp->X_op_symbol = (symbolS *) 0;
- }
-#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
-
- if (exp->X_op != O_constant
- && OUTPUT_FLAVOR == bfd_target_aout_flavour
- && exp_seg != absolute_section
- && exp_seg != text_section
- && exp_seg != data_section
- && exp_seg != bss_section && exp_seg != undefined_section
- && !bfd_is_com_section (exp_seg))
- {
- as_bad (_("unimplemented segment %s in operand"), exp_seg->name);
- return 0;
- }
-#endif
- i.maxq20_op[this_operand].disps = exp;
- return 1;
-}
-
-/* Parse OPERAND_STRING into the maxq20_insn structure I.
- Returns non-zero on error. */
-
-static int
-maxq20_operand (char *operand_string)
-{
- reg_entry *r = NULL;
- reg_bit *rb = NULL;
- mem_access *m = NULL;
- char *end_op = NULL;
- symbolS *sym = NULL;
- char *base_string = NULL;
- int ii = 0;
- /* Start and end of displacement string expression (if found). */
- char *displacement_string_start = NULL;
- char *displacement_string_end = NULL;
- /* This maintains the case sentivness. */
- char case_str_op_string[MAX_OPERAND_SIZE + 1];
- char str_op_string[MAX_OPERAND_SIZE + 1];
- char *org_case_op_string = case_str_op_string;
- char *op_string = str_op_string;
-
-
- memset (op_string, END_OF_INSN, (MAX_OPERAND_SIZE + 1));
- memset (org_case_op_string, END_OF_INSN, (MAX_OPERAND_SIZE + 1));
-
- memcpy (op_string, operand_string, strlen (operand_string) + 1);
- memcpy (org_case_op_string, operand_string, strlen (operand_string) + 1);
-
- ii = strlen (operand_string) + 1;
-
- if (ii > MAX_OPERAND_SIZE)
- {
- as_bad (_("Size of Operand '%s' greater than %d"), op_string,
- MAX_OPERAND_SIZE);
- return 0;
- }
-
- while (ii)
- {
- op_string[ii - 1] = toupper ((char) op_string[ii - 1]);
- ii--;
- }
-
- if (is_space_char (*op_string))
- ++op_string;
-
- if (isxdigit (operand_string[0]))
- {
- /* Now the operands can start with an Integer. */
- r = parse_reg_by_index (op_string);
- if (r != NULL)
- {
- if (is_space_char (*op_string))
- ++op_string;
- i.types[this_operand] = REG; /* Set the type. */
- i.maxq20_op[this_operand].reg = r; /* Set the Register value. */
- i.reg_operands++;
- return 1;
- }
-
- /* Get the original string. */
- memcpy (op_string, operand_string, strlen (operand_string) + 1);
- ii = strlen (operand_string) + 1;
-
- while (ii)
- {
- op_string[ii - 1] = toupper ((char) op_string[ii - 1]);
- ii--;
- }
- }
-
- /* Check for flags. */
- if (!strcmp (op_string, "Z"))
- {
- if (is_space_char (*op_string))
- ++op_string;
-
- i.types[this_operand] = FLAG; /* Set the type. */
- i.maxq20_op[this_operand].flag = FLAG_Z; /* Set the Register value. */
-
- i.flag_operands++;
-
- return 1;
- }
-
- else if (!strcmp (op_string, "NZ"))
- {
- if (is_space_char (*op_string))
- ++op_string;
-
- i.types[this_operand] = FLAG; /* Set the type. */
- i.maxq20_op[this_operand].flag = FLAG_NZ; /* Set the Register value. */
- i.flag_operands++;
- return 1;
- }
-
- else if (!strcmp (op_string, "NC"))
- {
- if (is_space_char (*op_string))
- ++op_string;
-
- i.types[this_operand] = FLAG; /* Set the type. */
- i.maxq20_op[this_operand].flag = FLAG_NC; /* Set the Register value. */
- i.flag_operands++;
- return 1;
- }
-
- else if (!strcmp (op_string, "E"))
- {
- if (is_space_char (*op_string))
- ++op_string;
-
- i.types[this_operand] = FLAG; /* Set the type. */
- i.maxq20_op[this_operand].flag = FLAG_E; /* Set the Register value. */
-
- i.flag_operands++;
-
- return 1;
- }
-
- else if (!strcmp (op_string, "S"))
- {
- if (is_space_char (*op_string))
- ++op_string;
-
- i.types[this_operand] = FLAG; /* Set the type. */
- i.maxq20_op[this_operand].flag = FLAG_S; /* Set the Register value. */
-
- i.flag_operands++;
-
- return 1;
- }
-
- else if (!strcmp (op_string, "C"))
- {
- if (is_space_char (*op_string))
- ++op_string;
-
- i.types[this_operand] = FLAG; /* Set the type. */
- i.maxq20_op[this_operand].flag = FLAG_C; /* Set the Register value. */
-
- i.flag_operands++;
-
- return 1;
- }
-
- else if (!strcmp (op_string, "NE"))
- {
-
- if (is_space_char (*op_string))
- ++op_string;
-
- i.types[this_operand] = FLAG; /* Set the type. */
-
- i.maxq20_op[this_operand].flag = FLAG_NE; /* Set the Register value. */
-
- i.flag_operands++;
-
- return 1;
- }
-
- /* CHECK FOR REGISTER BIT */
- else if ((rb = parse_register_bit (op_string, &end_op)) != NULL)
- {
- op_string = end_op;
-
- if (is_space_char (*op_string))
- ++op_string;
-
- i.types[this_operand] = BIT;
-
- i.maxq20_op[this_operand].r_bit = rb;
-
- i.bit_operands++;
-
- return 1;
- }
-
- else if (*op_string == IMMEDIATE_PREFIX) /* FOR IMMEDITE. */
- {
- if (is_space_char (*op_string))
- ++op_string;
-
- i.types[this_operand] = IMM;
-
- if (!maxq20_immediate (op_string))
- {
- as_bad (_("illegal immediate operand '%s'"), op_string);
- return 0;
- }
- return 1;
- }
-
- else if (*op_string == ABSOLUTE_PREFIX || !strcmp (op_string, "NUL"))
- {
- if (is_space_char (*op_string))
- ++op_string;
-
- /* For new requiremnt of copiler of for, @(BP,cons). */
- if (check_for_parse (op_string))
- {
- memset (op_string, '\0', strlen (op_string) + 1);
- memcpy (op_string, "@BP[OFFS]\0", 11);
- }
-
- i.types[this_operand] = MEM;
-
- if ((m = maxq20_mem_access (op_string, &end_op)) == NULL)
- {
- as_bad (_("Invalid operand for memory access '%s'"), op_string);
- return 0;
- }
- i.maxq20_op[this_operand].mem = m;
-
- i.mem_operands++;
-
- return 1;
- }
-
- else if ((r = parse_register (op_string, &end_op)) != NULL) /* Check for register. */
- {
- op_string = end_op;
-
- if (is_space_char (*op_string))
- ++op_string;
-
- i.types[this_operand] = REG; /* Set the type. */
- i.maxq20_op[this_operand].reg = r; /* Set the Register value. */
- i.reg_operands++;
- return 1;
- }
-
- if (this_operand == 1)
- {
- /* Changed for orginal case of data refrence on 30 Nov 2003. */
- /* The operand can either be a data reference or a symbol reference. */
- if ((sym = maxq20_data (org_case_op_string)) != NULL) /* Check for data memory. */
- {
- while (is_space_char (*op_string))
- ++op_string;
-
- /* Set the type of the operand. */
- i.types[this_operand] = DATA;
-
- /* Set the value of the data. */
- i.maxq20_op[this_operand].data = sym;
- i.data_operands++;
-
- return 1;
- }
-
- else if (is_digit_char (*op_string) || is_identifier_char (*op_string))
- {
- /* This is a memory reference of some sort. char *base_string;
- Start and end of displacement string expression (if found). char
- *displacement_string_start; char *displacement_string_end. */
- base_string = org_case_op_string + strlen (org_case_op_string);
-
- --base_string;
- if (is_space_char (*base_string))
- --base_string;
-
- /* If we only have a displacement, set-up for it to be parsed
- later. */
- displacement_string_start = org_case_op_string;
- displacement_string_end = base_string + 1;
- if (displacement_string_start != displacement_string_end)
- {
- if (!maxq20_displacement (displacement_string_start,
- displacement_string_end))
- {
- as_bad (_("illegal displacement operand "));
- return 0;
- }
- /* A displacement operand found. */
- i.types[this_operand] = DISP; /* Set the type. */
- return 1;
- }
- }
- }
-
- /* Check for displacement. */
- else if (is_digit_char (*op_string) || is_identifier_char (*op_string))
- {
- /* This is a memory reference of some sort. char *base_string;
- Start and end of displacement string expression (if found). char
- *displacement_string_start; char *displacement_string_end; */
- base_string = org_case_op_string + strlen (org_case_op_string);
-
- --base_string;
- if (is_space_char (*base_string))
- --base_string;
-
- /* If we only have a displacement, set-up for it to be parsed later. */
- displacement_string_start = org_case_op_string;
- displacement_string_end = base_string + 1;
- if (displacement_string_start != displacement_string_end)
- {
- if (!maxq20_displacement (displacement_string_start,
- displacement_string_end))
- return 0;
- /* A displacement operand found. */
- i.types[this_operand] = DISP; /* Set the type. */
- }
- }
- return 1;
-}
-
-/* Parse_operand takes as input instruction and operands and Parse operands
- and makes entry in the template. */
-
-static char *
-parse_operands (char *l, const char *mnemonic)
-{
- char *token_start;
-
- /* 1 if operand is pending after ','. */
- short int expecting_operand = 0;
-
- /* Non-zero if operand parens not balanced. */
- short int paren_not_balanced;
-
- int operand_ok;
-
- /* For Overcoming Warning of unused variable. */
- if (mnemonic)
- operand_ok = 0;
-
- while (*l != END_OF_INSN)
- {
- /* Skip optional white space before operand. */
- if (is_space_char (*l))
- ++l;
-
- if (!is_operand_char (*l) && *l != END_OF_INSN)
- {
- as_bad (_("invalid character %c before operand %d"),
- (char) (*l), i.operands + 1);
- return NULL;
- }
- token_start = l;
-
- paren_not_balanced = 0;
- while (paren_not_balanced || *l != ',')
- {
- if (*l == END_OF_INSN)
- {
- if (paren_not_balanced)
- {
- as_bad (_("unbalanced brackets in operand %d."),
- i.operands + 1);
- return NULL;
- }
-
- break;
- }
- else if (!is_operand_char (*l) && !is_space_char (*l))
- {
- as_bad (_("invalid character %c in operand %d"),
- (char) (*l), i.operands + 1);
- return NULL;
- }
- if (*l == '[')
- ++paren_not_balanced;
- if (*l == ']')
- --paren_not_balanced;
- l++;
- }
-
- if (l != token_start)
- {
- /* Yes, we've read in another operand. */
- this_operand = i.operands++;
- if (i.operands > MAX_OPERANDS)
- {
- as_bad (_("spurious operands; (%d operands/instruction max)"),
- MAX_OPERANDS);
- return NULL;
- }
-
- /* Now parse operand adding info to 'i' as we go along. */
- END_STRING_AND_SAVE (l);
-
- operand_ok = maxq20_operand (token_start);
-
- RESTORE_END_STRING (l);
-
- if (!operand_ok)
- return NULL;
- }
- else
- {
- if (expecting_operand)
- {
- expecting_operand_after_comma:
- as_bad (_("expecting operand after ','; got nothing"));
- return NULL;
- }
- }
-
- if (*l == ',')
- {
- if (*(++l) == END_OF_INSN)
- /* Just skip it, if it's \n complain. */
- goto expecting_operand_after_comma;
-
- expecting_operand = 1;
- }
- }
-
- return l;
-}
-
-static int
-match_operands (int type, MAX_ARG_TYPE flag_type, MAX_ARG_TYPE arg_type,
- int op_num)
-{
- switch (type)
- {
- case REG:
- if ((arg_type & A_REG) == A_REG)
- return 1;
- break;
- case IMM:
- if ((arg_type & A_IMM) == A_IMM)
- return 1;
- break;
- case IMMBIT:
- if ((arg_type & A_BIT_0) == A_BIT_0 && (i.maxq20_op[op_num].imms == 0))
- return 1;
- else if ((arg_type & A_BIT_1) == A_BIT_1
- && (i.maxq20_op[op_num].imms == 1))
- return 1;
- break;
- case MEM:
- if ((arg_type & A_MEM) == A_MEM)
- return 1;
- break;
-
- case FLAG:
- if ((arg_type & flag_type) == flag_type)
- return 1;
-
- break;
-
- case BIT:
- if ((arg_type & ACC_BIT) == ACC_BIT && !strcmp (i.maxq20_op[op_num].r_bit->reg->reg_name, "ACC"))
- return 1;
- else if ((arg_type & SRC_BIT) == SRC_BIT && (op_num == 1))
- return 1;
- else if ((op_num == 0) && (arg_type & DST_BIT) == DST_BIT)
- return 1;
- break;
- case DISP:
- if ((arg_type & A_DISP) == A_DISP)
- return 1;
- case DATA:
- if ((arg_type & A_DATA) == A_DATA)
- return 1;
- case BIT_BUCKET:
- if ((arg_type & A_BIT_BUCKET) == A_BIT_BUCKET)
- return 1;
- }
- return 0;
-}
-
-static int
-match_template (void)
-{
- /* Points to template once we've found it. */
- const MAXQ20_OPCODE_INFO *t;
- char inv_oper;
- inv_oper = 0;
-
- for (t = current_templates->start; t < current_templates->end; t++)
- {
- /* Must have right number of operands. */
- if (i.operands != t->op_number)
- continue;
- else if (!t->op_number)
- break;
-
- switch (i.operands)
- {
- case 2:
- if (!match_operands (i.types[1], i.maxq20_op[1].flag, t->arg[1], 1))
- {
- inv_oper = 1;
- continue;
- }
- case 1:
- if (!match_operands (i.types[0], i.maxq20_op[0].flag, t->arg[0], 0))
- {
- inv_oper = 2;
- continue;
- }
- }
- break;
- }
-
- if (t == current_templates->end)
- {
- /* We found no match. */
- as_bad (_("operand %d is invalid for `%s'"),
- inv_oper, current_templates->start->name);
- return 0;
- }
-
- /* Copy the template we have found. */
- i.op = *t;
- return 1;
-}
-
-/* This function filters out the various combinations of operands which are
- not allowed for a particular instruction. */
-
-static int
-match_filters (void)
-{
- /* Now we have at our disposal the instruction i. We will be using the
- following fields i.op.name : This is the mnemonic name. i.types[2] :
- These are the types of the operands (REG/IMM/DISP/MEM/BIT/FLAG/IMMBIT)
- i.maxq20_op[2] : This contains the specific info of the operands. */
-
- /* Our first filter : NO ALU OPERATIONS CAN HAVE THE ACTIVE ACCUMULATOR AS
- SOURCE. */
- if (!strcmp (i.op.name, "AND") || !strcmp (i.op.name, "OR")
- || !strcmp (i.op.name, "XOR") || !strcmp (i.op.name, "ADD")
- || !strcmp (i.op.name, "ADDC") || !strcmp (i.op.name, "SUB")
- || !strcmp (i.op.name, "SUBB"))
- {
- if (i.types[0] == REG)
- {
- if (i.maxq20_op[0].reg->Mod_name == 0xa)
- {
- as_bad (_
- ("The Accumulator cannot be used as a source in ALU instructions\n"));
- return 0;
- }
- }
- }
-
- if (!strcmp (i.op.name, "MOVE") && (i.types[0] == MEM || i.types[1] == MEM)
- && i.operands == 2)
- {
- mem_access_syntax *mem_op = NULL;
-
- if (i.types[0] == MEM)
- {
- mem_op =
- (mem_access_syntax *) hash_find (mem_syntax_hash,
- i.maxq20_op[0].mem->name);
- if ((mem_op->type == SRC) && mem_op)
- {
- as_bad (_("'%s' operand cant be used as destination in %s"),
- mem_op->name, i.op.name);
- return 0;
- }
- else if ((mem_op->invalid_op != NULL) && (i.types[1] == MEM)
- && mem_op)
- {
- int k = 0;
-
- for (k = 0; k < 5 || !mem_op->invalid_op[k]; k++)
- {
- if (mem_op->invalid_op[k] != NULL)
- if (!strcmp
- (mem_op->invalid_op[k], i.maxq20_op[1].mem->name))
- {
- as_bad (_
- ("Invalid Instruction '%s' operand cant be used with %s"),
- mem_op->name, i.maxq20_op[1].mem->name);
- return 0;
- }
- }
- }
- }
-
- if (i.types[1] == MEM)
- {
- mem_op = NULL;
- mem_op =
- (mem_access_syntax *) hash_find (mem_syntax_hash,
- i.maxq20_op[1].mem->name);
- if (mem_op->type == DST && mem_op)
- {
- as_bad (_("'%s' operand cant be used as source in %s"),
- mem_op->name, i.op.name);
- return 0;
- }
- else if (mem_op->invalid_op != NULL && i.types[0] == MEM && mem_op)
- {
- int k = 0;
-
- for (k = 0; k < 5 || !mem_op->invalid_op[k]; k++)
- {
- if (mem_op->invalid_op[k] != NULL)
- if (!strcmp
- (mem_op->invalid_op[k], i.maxq20_op[0].mem->name))
- {
- as_bad (_
- ("Invalid Instruction '%s' operand cant be used with %s"),
- mem_op->name, i.maxq20_op[0].mem->name);
- return 0;
- }
- }
- }
- else if (i.types[0] == REG
- && !strcmp (i.maxq20_op[0].reg->reg_name, "OFFS")
- && mem_op)
- {
- if (!strcmp (mem_op->name, "@BP[OFFS--]")
- || !strcmp (mem_op->name, "@BP[OFFS++]"))
- {
- as_bad (_
- ("Invalid Instruction '%s' operand cant be used with %s"),
- mem_op->name, i.maxq20_op[0].mem->name);
- return 0;
- }
- }
- }
- }
-
- /* Added for SRC and DST in one operand instructioni i.e OR @--DP[1] added
- on 10-March-2004. */
- if ((i.types[0] == MEM) && (i.operands == 1)
- && !(!strcmp (i.op.name, "POP") || !strcmp (i.op.name, "POPI")))
- {
- mem_access_syntax *mem_op = NULL;
-
- if (i.types[0] == MEM)
- {
- mem_op =
- (mem_access_syntax *) hash_find (mem_syntax_hash,
- i.maxq20_op[0].mem->name);
- if (mem_op->type == DST && mem_op)
- {
- as_bad (_("'%s' operand cant be used as source in %s"),
- mem_op->name, i.op.name);
- return 0;
- }
- }
- }
-
- if (i.operands == 2 && i.types[0] == IMM)
- {
- as_bad (_("'%s' instruction cant have first operand as Immediate vale"),
- i.op.name);
- return 0;
- }
-
- /* Our second filter : SP or @SP-- cannot be used with PUSH or POP */
- if (!strcmp (i.op.name, "PUSH") || !strcmp (i.op.name, "POP")
- || !strcmp (i.op.name, "POPI"))
- {
- if (i.types[0] == REG)
- {
- if (!strcmp (i.maxq20_op[0].reg->reg_name, "SP"))
- {
- as_bad (_("SP cannot be used with %s\n"), i.op.name);
- return 0;
- }
- }
- else if (i.types[0] == MEM
- && !strcmp (i.maxq20_op[0].mem->name, "@SP--"))
- {
- as_bad (_("@SP-- cannot be used with PUSH\n"));
- return 0;
- }
- }
-
- /* This filter checks that two memory references using DP's cannot be used
- together in an instruction */
- if (!strcmp (i.op.name, "MOVE") && i.mem_operands == 2)
- {
- if (strlen (i.maxq20_op[0].mem->name) != 6 ||
- strcmp (i.maxq20_op[0].mem->name, i.maxq20_op[1].mem->name))
- {
- if (!strncmp (i.maxq20_op[0].mem->name, "@DP", 3)
- && !strncmp (i.maxq20_op[1].mem->name, "@DP", 3))
- {
- as_bad (_
- ("Operands either contradictory or use the data bus in read/write state together"));
- return 0;
- }
-
- if (!strncmp (i.maxq20_op[0].mem->name, "@SP", 3)
- && !strncmp (i.maxq20_op[1].mem->name, "@SP", 3))
- {
- as_bad (_
- ("Operands either contradictory or use the data bus in read/write state together"));
- return 0;
- }
- }
- if ((i.maxq20_op[1].mem != NULL)
- && !strncmp (i.maxq20_op[1].mem->name, "NUL", 3))
- {
- as_bad (_("MOVE Cant Use NUL as SRC"));
- return 0;
- }
- }
-
- /* This filter checks that contradictory movement between DP register and
- Memory access using DP followed by increment or decrement. */
-
- if (!strcmp (i.op.name, "MOVE") && i.mem_operands == 1
- && i.reg_operands == 1)
- {
- int memnum, regnum;
-
- memnum = (i.types[0] == MEM) ? 0 : 1;
- regnum = (memnum == 0) ? 1 : 0;
- if (!strncmp (i.maxq20_op[regnum].reg->reg_name, "DP", 2) &&
- !strncmp ((i.maxq20_op[memnum].mem->name) + 1,
- i.maxq20_op[regnum].reg->reg_name, 5)
- && strcmp ((i.maxq20_op[memnum].mem->name) + 1,
- i.maxq20_op[regnum].reg->reg_name))
- {
- as_bad (_
- ("Contradictory movement between DP register and memory access using DP"));
- return 0;
- }
- else if (!strcmp (i.maxq20_op[regnum].reg->reg_name, "SP") &&
- !strncmp ((i.maxq20_op[memnum].mem->name) + 1,
- i.maxq20_op[regnum].reg->reg_name, 2))
- {
- as_bad (_
- ("SP and @SP-- cannot be used together in a move instruction"));
- return 0;
- }
- }
-
- /* This filter restricts the instructions containing source and destination
- bits to only CTRL module of the serial registers. Peripheral registers
- yet to be defined. */
-
- if (i.bit_operands == 1 && i.operands == 2)
- {
- int bitnum = (i.types[0] == BIT) ? 0 : 1;
-
- if (strcmp (i.maxq20_op[bitnum].r_bit->reg->reg_name, "ACC"))
- {
- if (i.maxq20_op[bitnum].r_bit->reg->Mod_name >= 0x7 &&
- i.maxq20_op[bitnum].r_bit->reg->Mod_name != CTRL)
- {
- as_bad (_
- ("Only Module 8 system registers allowed in this operation"));
- return 0;
- }
- }
- }
-
- /* This filter is for checking the register bits. */
- if (i.bit_operands == 1 || i.operands == 2)
- {
- int bitnum = 0, size = 0;
-
- bitnum = (i.types[0] == BIT) ? 0 : 1;
- if (i.bit_operands == 1)
- {
- switch (i.maxq20_op[bitnum].r_bit->reg->rtype)
- {
- case Reg_8W:
- size = 7; /* 8 bit register, both read and write. */
- break;
- case Reg_16W:
- size = 15;
- break;
- case Reg_8R:
- size = 7;
- if (bitnum == 0)
- {
- as_fatal (_("Read only Register used as destination"));
- return 0;
- }
- break;
-
- case Reg_16R:
- size = 15;
- if (bitnum == 0)
- {
- as_fatal (_("Read only Register used as destination"));
- return 0;
- }
- break;
- }
-
- if (size < (i.maxq20_op[bitnum].r_bit)->bit)
- {
- as_bad (_("Bit No '%d'exceeds register size in this operation"),
- (i.maxq20_op[bitnum].r_bit)->bit);
- return 0;
- }
- }
-
- if (i.bit_operands == 2)
- {
- switch ((i.maxq20_op[0].r_bit)->reg->rtype)
- {
- case Reg_8W:
- size = 7; /* 8 bit register, both read and write. */
- break;
- case Reg_16W:
- size = 15;
- break;
- case Reg_8R:
- case Reg_16R:
- as_fatal (_("Read only Register used as destination"));
- return 0;
- }
-
- if (size < (i.maxq20_op[0].r_bit)->bit)
- {
- as_bad (_
- ("Bit No '%d' exceeds register size in this operation"),
- (i.maxq20_op[0].r_bit)->bit);
- return 0;
- }
-
- size = 0;
- switch ((i.maxq20_op[1].r_bit)->reg->rtype)
- {
- case Reg_8R:
- case Reg_8W:
- size = 7; /* 8 bit register, both read and write. */
- break;
- case Reg_16R:
- case Reg_16W:
- size = 15;
- break;
- }
-
- if (size < (i.maxq20_op[1].r_bit)->bit)
- {
- as_bad (_
- ("Bit No '%d' exceeds register size in this operation"),
- (i.maxq20_op[1].r_bit)->bit);
- return 0;
- }
- }
- }
-
- /* No branch operations should occur into the data memory. Hence any memory
- references have to be filtered out when used with instructions like
- jump, djnz[] and call. */
-
- if (!strcmp (i.op.name, "JUMP") || !strcmp (i.op.name, "CALL")
- || !strncmp (i.op.name, "DJNZ", 4))
- {
- if (i.mem_operands)
- as_warn (_
- ("Memory References cannot be used with branching operations\n"));
- }
-
- if (!strcmp (i.op.name, "DJNZ"))
- {
- if (!
- (strcmp (i.maxq20_op[0].reg->reg_name, "LC[0]")
- || strcmp (i.maxq20_op[0].reg->reg_name, "LC[1]")))
- {
- as_bad (_("DJNZ uses only LC[n] register \n"));
- return 0;
- }
- }
-
- /* No destination register used should be read only! */
- if ((i.operands == 2 && i.types[0] == REG) || !strcmp (i.op.name, "POP")
- || !strcmp (i.op.name, "POPI"))
- { /* The destination is a register */
- int regnum = 0;
-
- if (!strcmp (i.op.name, "POP") || !strcmp (i.op.name, "POPI"))
- {
- regnum = 0;
-
- if (i.types[regnum] == MEM)
- {
- mem_access_syntax *mem_op = NULL;
-
- mem_op =
- (mem_access_syntax *) hash_find (mem_syntax_hash,
- i.maxq20_op[regnum].mem->
- name);
- if (mem_op->type == SRC && mem_op)
- {
- as_bad (_
- ("'%s' operand cant be used as destination in %s"),
- mem_op->name, i.op.name);
- return 0;
- }
- }
- }
-
- if (i.maxq20_op[regnum].reg->rtype == Reg_8R
- || i.maxq20_op[regnum].reg->rtype == Reg_16R)
- {
- as_bad (_("Read only register used for writing purposes '%s'"),
- i.maxq20_op[regnum].reg->reg_name);
- return 0;
- }
- }
-
- /* While moving the address of a data in the data section, the destination
- should be either data pointers only. */
- if ((i.data_operands) && (i.operands == 2))
- {
- if ((i.types[0] != REG) && (i.types[0] != MEM))
- {
- as_bad (_("Invalid destination for this kind of source."));
- return 0;
- }
-
- if (i.types[0] == REG && i.maxq20_op[0].reg->rtype == Reg_8W)
- {
- as_bad (_
- ("Invalid register as destination for this kind of source.Only data pointers can be used."));
- return 0;
- }
- }
- return 1;
-}
-
-static int
-decode_insn (void)
-{
- /* Check for the format Bit if defined. */
- if (i.op.format == 0 || i.op.format == 1)
- i.instr[0] = i.op.format << 7;
- else
- {
- /* Format bit not defined. We will have to be find it out ourselves. */
- if (i.imm_operands == 1 || i.data_operands == 1 || i.disp_operands == 1)
- i.op.format = 0;
- else
- i.op.format = 1;
- i.instr[0] = i.op.format << 7;
- }
-
- /* Now for the destination register. */
-
- /* If destination register is already defined . The conditions are the
- following: (1) The second entry in the destination array should be 0 (2)
- If there are two operands then the first entry should not be a register,
- memory or a register bit (3) If there are less than two operands and the
- it is not a pop operation (4) The second argument is the carry
- flag(applicable to move Acc.<b>,C. */
- if (i.op.dst[1] == 0
- &&
- ((i.types[0] != REG && i.types[0] != MEM && i.types[0] != BIT
- && i.operands == 2) || (i.operands < 2 && strcmp (i.op.name, "POP")
- && strcmp (i.op.name, "POPI"))
- || (i.op.arg[1] == FLAG_C)))
- {
- i.op.dst[0] &= 0x7f;
- i.instr[0] |= i.op.dst[0];
- }
- else if (i.op.dst[1] == 0 && !strcmp (i.op.name, "DJNZ")
- &&
- (((i.types[0] == REG)
- && (!strcmp (i.maxq20_op[0].reg->reg_name, "LC[0]")
- || !strcmp (i.maxq20_op[0].reg->reg_name, "LC[1]")))))
- {
- i.op.dst[0] &= 0x7f;
- if (!strcmp (i.maxq20_op[0].reg->reg_name, "LC[0]"))
- i.instr[0] |= 0x4D;
-
- if (!strcmp (i.maxq20_op[0].reg->reg_name, "LC[1]"))
- i.instr[0] |= 0x5D;
- }
- else
- {
- unsigned char temp;
-
- /* Target register will have to be specified. */
- if (i.types[0] == REG
- && (i.op.dst[0] == REG || i.op.dst[0] == (REG | MEM)))
- {
- temp = (i.maxq20_op[0].reg)->opcode;
- temp &= 0x7f;
- i.instr[0] |= temp;
- }
- else if (i.types[0] == MEM && (i.op.dst[0] == (REG | MEM)))
- {
- temp = (i.maxq20_op[0].mem)->opcode;
- temp &= 0x7f;
- i.instr[0] |= temp;
- }
- else if (i.types[0] == BIT && (i.op.dst[0] == REG))
- {
- temp = (i.maxq20_op[0].r_bit)->reg->opcode;
- temp &= 0x7f;
- i.instr[0] |= temp;
- }
- else if (i.types[1] == BIT && (i.op.dst[0] == BIT))
- {
- temp = (i.maxq20_op[1].r_bit)->bit;
- temp = temp << 4;
- temp |= i.op.dst[1];
- temp &= 0x7f;
- i.instr[0] |= temp;
- }
- else
- {
- as_bad (_("Invalid Instruction"));
- return 0;
- }
- }
-
- /* Now for the source register. */
-
- /* If Source register is already known. The following conditions are
- checked: (1) There are no operands (2) If there is only one operand and
- it is a flag (3) If the operation is MOVE C,#0/#1 (4) If it is a POP
- operation. */
-
- if (i.operands == 0 || (i.operands == 1 && i.types[0] == FLAG)
- || (i.types[0] == FLAG && i.types[1] == IMMBIT)
- || !strcmp (i.op.name, "POP") || !strcmp (i.op.name, "POPI"))
- i.instr[1] = i.op.src[0];
-
- else if (i.imm_operands == 1 && ((i.op.src[0] & IMM) == IMM))
- i.instr[1] = i.maxq20_op[this_operand].imms;
-
- else if (i.types[this_operand] == REG && ((i.op.src[0] & REG) == REG))
- i.instr[1] = (char) ((i.maxq20_op[this_operand].reg)->opcode);
-
- else if (i.types[this_operand] == BIT && ((i.op.src[0] & REG) == REG))
- i.instr[1] = (char) (i.maxq20_op[this_operand].r_bit->reg->opcode);
-
- else if (i.types[this_operand] == MEM && ((i.op.src[0] & MEM) == MEM))
- i.instr[1] = (char) ((i.maxq20_op[this_operand].mem)->opcode);
-
- else if (i.types[this_operand] == DATA && ((i.op.src[0] & DATA) == DATA))
- /* This will copy only the lower order bytes into the instruction. The
- higher order bytes have already been copied into the prefix register. */
- i.instr[1] = 0;
-
- /* Decoding the source in the case when the second array entry is not 0.
- This means that the source register has been divided into two nibbles. */
-
- else if (i.op.src[1] != 0)
- {
- /* If the first operand is a accumulator bit then
- the first 4 bits will be filled with the bit number. */
- if (i.types[0] == BIT && ((i.op.src[0] & BIT) == BIT))
- {
- unsigned char temp = (i.maxq20_op[0].r_bit)->bit;
-
- temp = temp << 4;
- temp |= i.op.src[1];
- i.instr[1] = temp;
- }
- /* In case of MOVE dst.<b>,#1 The first nibble in the source register
- has to start with a zero. This is called a ZEROBIT */
- else if (i.types[0] == BIT && ((i.op.src[0] & ZEROBIT) == ZEROBIT))
- {
- char temp = (i.maxq20_op[0].r_bit)->bit;
-
- temp = temp << 4;
- temp |= i.op.src[1];
- temp &= 0x7f;
- i.instr[1] = temp;
- }
- /* Similarly for a ONEBIT */
- else if (i.types[0] == BIT && ((i.op.src[0] & ONEBIT) == ONEBIT))
- {
- char temp = (i.maxq20_op[0].r_bit)->bit;
-
- temp = temp << 4;
- temp |= i.op.src[1];
- temp |= 0x80;
- i.instr[1] = temp;
- }
- /* In case the second operand is a register bit (MOVE C,Acc.<b> or MOVE
- C,src.<b> */
- else if (i.types[1] == BIT)
- {
- if (i.op.src[1] == 0 && i.op.src[1] == REG)
- i.instr[1] = (i.maxq20_op[1].r_bit)->reg->opcode;
-
- else if (i.op.src[0] == BIT && i.op.src)
- {
- char temp = (i.maxq20_op[1].r_bit)->bit;
-
- temp = temp << 4;
- temp |= i.op.src[1];
- i.instr[1] = temp;
- }
- }
- else
- {
- as_bad (_("Invalid Instruction"));
- return 0;
- }
- }
- return 1;
-}
-
-/* This is a function for outputting displacement operands. */
-
-static void
-output_disp (fragS *insn_start_frag, offsetT insn_start_off)
-{
- char *p;
- relax_substateT subtype;
- symbolS *sym;
- offsetT off;
- int diff;
-
- diff = 0;
- insn_start_frag = frag_now;
- insn_start_off = frag_now_fix ();
-
- switch (i.Instr_Prefix)
- {
- case LONG_PREFIX:
- subtype = EXPLICT_LONG_PREFIX;
- break;
- case SHORT_PREFIX:
- subtype = SHORT_PREFIX;
- break;
- default:
- subtype = NO_PREFIX;
- break;
- }
-
- /* Its a symbol. Here we end the frag and start the relaxation. Now in our
- case there is no need for relaxation. But we do need support for a
- prefix operator. Hence we will check whethere is room for 4 bytes ( 2
- for prefix + 2 for the current instruction ) Hence if at a particular
- time we find out whether the prefix operator is reqd , we shift the
- current instruction two places ahead and insert the prefix instruction. */
- frag_grow (2 + 2);
- p = frag_more (2);
-
- sym = i.maxq20_op[this_operand].disps->X_add_symbol;
- off = i.maxq20_op[this_operand].disps->X_add_number;
-
- if (i.maxq20_op[this_operand].disps->X_add_symbol != NULL && sym && frag_now
- && (subtype != EXPLICT_LONG_PREFIX))
- {
- /* If in the same frag. */
- if (frag_now == symbol_get_frag (sym))
- {
- diff =
- ((((expressionS *) symbol_get_value_expression (sym))->
- X_add_number) - insn_start_off);
-
- /* PC points to the next instruction. */
- diff = (diff / MAXQ_OCTETS_PER_BYTE) - 1;
-
- if (diff >= -128 && diff <= 127)
- {
- i.instr[1] = (char) diff;
-
- /* This will be overwritten later when the symbol is resolved. */
- *p = i.instr[1];
- *(p + 1) = i.instr[0];
-
- /* No Need to create a FIXUP. */
- return;
- }
- }
- }
-
- /* This will be overwritten later when the symbol is resolved. */
- *p = i.instr[1];
- *(p + 1) = i.instr[0];
-
- if (i.maxq20_op[this_operand].disps->X_op != O_constant
- && i.maxq20_op[this_operand].disps->X_op != O_symbol)
- {
- /* Handle complex expressions. */
- sym = make_expr_symbol (i.maxq20_op[this_operand].disps);
- off = 0;
- }
-
- /* Vineet : This has been added for md_estimate_size_before_relax to
- estimate the correct size. */
- if (subtype != SHORT_PREFIX)
- i.reloc[this_operand] = LONG_PREFIX;
-
- frag_var (rs_machine_dependent, 2, i.reloc[this_operand], subtype, sym, off, p);
-}
-
-/* This is a function for outputting displacement operands. */
-
-static void
-output_data (fragS *insn_start_frag, offsetT insn_start_off)
-{
- char *p;
- relax_substateT subtype;
- symbolS *sym;
- offsetT off;
- int diff;
-
- diff = 0;
- off = 0;
- insn_start_frag = frag_now;
- insn_start_off = frag_now_fix ();
-
- subtype = EXPLICT_LONG_PREFIX;
-
- frag_grow (2 + 2);
- p = frag_more (2);
-
- sym = i.maxq20_op[this_operand].data;
- off = 0;
-
- /* This will be overwritten later when the symbol is resolved. */
- *p = i.instr[1];
- *(p + 1) = i.instr[0];
-
- if (i.maxq20_op[this_operand].disps->X_op != O_constant
- && i.maxq20_op[this_operand].disps->X_op != O_symbol)
- /* Handle complex expressions. */
- /* Because data is already in terms of symbol so no
- need to convert it from expression to symbol. */
- off = 0;
-
- frag_var (rs_machine_dependent, 2, i.reloc[this_operand], subtype, sym, off, p);
-}
-
-static void
-output_insn (void)
-{
- fragS *insn_start_frag;
- offsetT insn_start_off;
- char *p;
-
- /* Tie dwarf2 debug info to the address at the start of the insn. We can't
- do this after the insn has been output as the current frag may have been
- closed off. eg. by frag_var. */
- dwarf2_emit_insn (0);
-
- /* To ALign the text section on word. */
-
- frag_align (1, 0, 1);
-
- /* We initialise the frags for this particular instruction. */
- insn_start_frag = frag_now;
- insn_start_off = frag_now_fix ();
-
- /* If there are displacement operators(unresolved) present, then handle
- them separately. */
- if (i.disp_operands)
- {
- output_disp (insn_start_frag, insn_start_off);
- return;
- }
-
- if (i.data_operands)
- {
- output_data (insn_start_frag, insn_start_off);
- return;
- }
-
- /* Check whether the INSERT_BUFFER has to be written. */
- if (strcmp (INSERT_BUFFER, ""))
- {
- p = frag_more (2);
-
- *p++ = INSERT_BUFFER[1];
- *p = INSERT_BUFFER[0];
- }
-
- /* Check whether the prefix instruction has to be written. */
- if (strcmp (PFX_INSN, ""))
- {
- p = frag_more (2);
-
- *p++ = PFX_INSN[1];
- *p = PFX_INSN[0];
- }
-
- p = frag_more (2);
- /* For Little endian. */
- *p++ = i.instr[1];
- *p = i.instr[0];
-}
-
-static void
-make_new_reg_table (void)
-{
- unsigned long size_pm = sizeof (peripheral_reg_table);
- num_of_reg = ARRAY_SIZE (peripheral_reg_table);
-
- new_reg_table = xmalloc (size_pm);
- if (new_reg_table == NULL)
- as_bad (_("Cannot allocate memory"));
-
- memcpy (new_reg_table, peripheral_reg_table, size_pm);
-}
-
-/* pmmain performs the initilizations for the pheripheral modules. */
-
-static void
-pmmain (void)
-{
- make_new_reg_table ();
- return;
-}
-
-void
-md_begin (void)
-{
- const char *hash_err = NULL;
- int c = 0;
- char *p;
- const MAXQ20_OPCODE_INFO *optab;
- MAXQ20_OPCODES *core_optab; /* For opcodes of the same name. This will
- be inserted into the hash table. */
- struct reg *reg_tab;
- struct mem_access_syntax const *memsyntab;
- struct mem_access *memtab;
- struct bit_name *bittab;
-
- /* Initilize pherioipheral modules. */
- pmmain ();
-
- /* Initialise the opcode hash table. */
- op_hash = hash_new ();
-
- optab = op_table; /* Initialise it to the first entry of the
- maxq20 operand table. */
-
- /* Setup for loop. */
- core_optab = xmalloc (sizeof (MAXQ20_OPCODES));
- core_optab->start = optab;
-
- while (1)
- {
- ++optab;
- if (optab->name == NULL || strcmp (optab->name, (optab - 1)->name) != 0)
- {
- /* different name --> ship out current template list; add to hash
- table; & begin anew. */
-
- core_optab->end = optab;
-#ifdef MAXQ10S
- if (max_version == bfd_mach_maxq10)
- {
- if (((optab - 1)->arch == MAXQ10) || ((optab - 1)->arch == MAX))
- {
- hash_err = hash_insert (op_hash,
- (optab - 1)->name,
- (void *) core_optab);
- }
- }
- else if (max_version == bfd_mach_maxq20)
- {
- if (((optab - 1)->arch == MAXQ20) || ((optab - 1)->arch == MAX))
- {
-#endif
- hash_err = hash_insert (op_hash,
- (optab - 1)->name,
- (void *) core_optab);
-#if MAXQ10S
- }
- }
- else
- as_fatal (_("Internal Error: Illegal Architecure specified"));
-#endif
- if (hash_err)
- as_fatal (_("Internal Error: Can't hash %s: %s"),
- (optab - 1)->name, hash_err);
-
- if (optab->name == NULL)
- break;
- core_optab = xmalloc (sizeof (MAXQ20_OPCODES));
- core_optab->start = optab;
- }
- }
-
- /* Initialise a new register table. */
- reg_hash = hash_new ();
-
- for (reg_tab = system_reg_table;
- reg_tab < (system_reg_table + ARRAY_SIZE (system_reg_table));
- reg_tab++)
- {
-#if MAXQ10S
- switch (max_version)
- {
- case bfd_mach_maxq10:
- if ((reg_tab->arch == MAXQ10) || (reg_tab->arch == MAX))
- hash_err = hash_insert (reg_hash, reg_tab->reg_name, (void *) reg_tab);
- break;
-
- case bfd_mach_maxq20:
- if ((reg_tab->arch == MAXQ20) || (reg_tab->arch == MAX))
- {
-#endif
- hash_err =
- hash_insert (reg_hash, reg_tab->reg_name, (void *) reg_tab);
-#if MAXQ10S
- }
- break;
- default:
- as_fatal (_("Invalid architecture type"));
- }
-#endif
-
- if (hash_err)
- as_fatal (_("Internal Error : Can't Hash %s : %s"),
- reg_tab->reg_name, hash_err);
- }
-
- /* Pheripheral Registers Entry. */
- for (reg_tab = new_reg_table;
- reg_tab < (new_reg_table + num_of_reg - 1); reg_tab++)
- {
- hash_err = hash_insert (reg_hash, reg_tab->reg_name, (void *) reg_tab);
-
- if (hash_err)
- as_fatal (_("Internal Error : Can't Hash %s : %s"),
- reg_tab->reg_name, hash_err);
- }
-
- /* Initialise a new memory operand table. */
- mem_hash = hash_new ();
-
- for (memtab = mem_table;
- memtab < mem_table + ARRAY_SIZE (mem_table);
- memtab++)
- {
- hash_err = hash_insert (mem_hash, memtab->name, (void *) memtab);
- if (hash_err)
- as_fatal (_("Internal Error : Can't Hash %s : %s"),
- memtab->name, hash_err);
- }
-
- bit_hash = hash_new ();
-
- for (bittab = bit_table;
- bittab < bit_table + ARRAY_SIZE (bit_table);
- bittab++)
- {
- hash_err = hash_insert (bit_hash, bittab->name, (void *) bittab);
- if (hash_err)
- as_fatal (_("Internal Error : Can't Hash %s : %s"),
- bittab->name, hash_err);
- }
-
- mem_syntax_hash = hash_new ();
-
- for (memsyntab = mem_access_syntax_table;
- memsyntab < mem_access_syntax_table + ARRAY_SIZE (mem_access_syntax_table);
- memsyntab++)
- {
- hash_err =
- hash_insert (mem_syntax_hash, memsyntab->name, (void *) memsyntab);
- if (hash_err)
- as_fatal (_("Internal Error : Can't Hash %s : %s"),
- memsyntab->name, hash_err);
- }
-
- /* Initialise the lexical tables,mnemonic chars,operand chars. */
- for (c = 0; c < 256; c++)
- {
- if (ISDIGIT (c))
- {
- digit_chars[c] = c;
- mnemonic_chars[c] = c;
- operand_chars[c] = c;
- register_chars[c] = c;
- }
- else if (ISLOWER (c))
- {
- mnemonic_chars[c] = c;
- operand_chars[c] = c;
- register_chars[c] = c;
- }
- else if (ISUPPER (c))
- {
- mnemonic_chars[c] = TOLOWER (c);
- register_chars[c] = c;
- operand_chars[c] = c;
- }
-
- if (ISALPHA (c) || ISDIGIT (c))
- {
- identifier_chars[c] = c;
- }
- else if (c > 128)
- {
- identifier_chars[c] = c;
- operand_chars[c] = c;
- }
- }
-
- /* All the special characters. */
- register_chars['@'] = '@';
- register_chars['+'] = '+';
- register_chars['-'] = '-';
- digit_chars['-'] = '-';
- identifier_chars['_'] = '_';
- identifier_chars['.'] = '.';
- register_chars['['] = '[';
- register_chars[']'] = ']';
- operand_chars['_'] = '_';
- operand_chars['#'] = '#';
- mnemonic_chars['['] = '[';
- mnemonic_chars[']'] = ']';
-
- for (p = operand_special_chars; *p != '\0'; p++)
- operand_chars[(unsigned char) *p] = (unsigned char) *p;
-
- /* Set the maxq arch type. */
- maxq_target (max_version);
-}
-
-/* md_assemble - Parse Instr - Seprate menmonics and operands - lookup the
- menmunonic in the operand table - Parse operands and populate the
- structure/template - Match the operand with opcode and its validity -
- Output Instr. */
-
-void
-md_assemble (char *line)
-{
- int j;
-
- char mnemonic[MAX_MNEM_SIZE];
- char temp4prev[256];
- static char prev_insn[256];
-
- /* Initialize globals. */
- memset (&i, '\0', sizeof (i));
- for (j = 0; j < MAX_OPERANDS; j++)
- i.reloc[j] = NO_RELOC;
-
- i.prefix = -1;
- PFX_INSN[0] = 0;
- PFX_INSN[1] = 0;
- INSERT_BUFFER[0] = 0;
- INSERT_BUFFER[1] = 0;
-
- memcpy (temp4prev, line, strlen (line) + 1);
-
- save_stack_p = save_stack;
-
- line = (char *) parse_insn (line, mnemonic);
- if (line == NULL)
- return;
-
- line = (char *) parse_operands (line, mnemonic);
- if (line == NULL)
- return;
-
- /* Next, we find a template that matches the given insn, making sure the
- overlap of the given operands types is consistent with the template
- operand types. */
- if (!match_template ())
- return;
-
- /* In the MAXQ20, there are certain register combinations, and other
- restrictions which are not allowed. We will try to resolve these right
- now. */
- if (!match_filters ())
- return;
-
- /* Check for the appropriate PFX register. */
- set_prefix ();
- pfx_for_imm_val (0);
-
- if (!decode_insn ()) /* decode insn. */
- need_pass_2 = 1;
-
- /* Check for Exlipct PFX instruction. */
- if (PFX_INSN[0] && (strstr (prev_insn, "PFX") || strstr (prev_insn, "pfx")))
- as_warn (_("Ineffective insntruction %s \n"), prev_insn);
-
- memcpy (prev_insn, temp4prev, strlen (temp4prev) + 1);
-
- /* We are ready to output the insn. */
- output_insn ();
-}
+++ /dev/null
-/* tc-maxq.h -- Header file for the assembler(MAXQ)
-
- Copyright 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
-
- Contributed by HCL Technologies Pvt. Ltd.
-
- Written by Vineet Sharma(vineets@noida.hcltech.com) Inderpreet
- S.(inderpreetb@noida.hcltech.com)
-
- This file is part of GAS.
-
- GAS is free software; you can redistribute it and/or modify it under the
- terms of the GNU General Public License as published by the Free Software
- Foundation; either version 3, or (at your option) any later version.
-
- GAS is distributed in the hope that it will be useful, but WITHOUT ANY
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
- details.
-
- You should have received a copy of the GNU General Public License along
- with GAS; see the file COPYING. If not, write to the Free Software
- Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-
-#ifndef _TC_MAXQ_H_
-#define _TC_MAXQ_H_
-
-#ifndef NO_RELOC
-#define NO_RELOC 0
-#endif
-
-/* `md_short_jump_size' `md_long_jump_size' `md_create_short_jump'
- `md_create_long_jump' If `WORKING_DOT_WORD' is defined, GAS will not do
- broken word processing (*note Broken words::.). Otherwise, you should set
- `md_short_jump_size' to the size of a short jump (a jump that is just long
- enough to jump around a long jmp) and `md_long_jump_size' to the size of a
- long jump (a jump that can go anywhere in the function), You should define
- `md_create_short_jump' to create a short jump around a long jump, and
- define `md_create_long_jump' to create a long jump. */
-#define WORKING_DOT_WORD
-typedef enum _RELOC_ENUM
-{
- MAXQ_WORDDATA = 5, /* Word+n. */
- MAXQ_LONGDATA = 2, /* Long+n. */
- MAXQ_INTERSEGMENT = 4, /* Text to any other segment. */
- MAXQ_SHORTJUMP = BFD_RELOC_16_PCREL_S2, /* PC Relative. */
- MAXQ_LONGJUMP = 6, /* Absolute Jump. */
- EXTERNAL_RELOC = 8,
- INTERSEGMENT_RELOC
-}
-RELOC_ENUM;
-
-#ifndef MAX_STACK
-#define MAX_STACK 0xf
-#endif
-
-#ifndef TC_MAXQ20
-#define TC_MAXQ20 1
-#endif
-
-#ifndef MAX_OPERAND_SIZE
-#define MAX_OPERAND_SIZE 255
-#endif
-
-#ifndef MAXQ_INSTRUCTION_SIZE
-#define MAXQ_INSTRUCTION_SIZE 2 /* 16 - BITS */
-#endif
-
-#if MAXQ_INSTRUCTION_SIZE
-#define MAXQ_OCTETS_PER_BYTE MAXQ_INSTRUCTION_SIZE
-#else
-#define MAXQ_OCTETS_PER_BYTE OCTETS_PER_BYTE
-#endif
-
-/* if this macro is defined gas will use this instead of comment_chars. */
-#define tc_comments_chars maxq20_comment_chars
-
-#define tc_coff_symbol_emit_hook(a) ; /* not used */
-
-#define md_section_align(SEGMENT, SIZE) (SIZE)
-
-/* Locally defined symbol shoudnot be adjusted to section symbol. */
-#define tc_fix_adjustable(FIX) 0
-
-/* This specifies that the target has been defined as little endian -
- default. */
-#define TARGET_BYTES_BIG_ENDIAN 0
-
-#define MAX_MEM_NAME_SIZE 12
-#define MAX_REG_NAME_SIZE 7
-#define MAX_MNEM_SIZE 8
-
-#define END_OF_INSN '\0'
-
-/* This macro is the BFD archetectureto pass to 'bfd_set_arch_mach'. */
-#define TARGET_ARCH bfd_arch_maxq
-
-/* This macro is the BFD machine number to pass to 'bfd_set_arch_mach'.
- If not defines GAS will use 0. */
-#define TARGET_MACH maxq20_mach ()
-extern unsigned long maxq20_mach (void);
-
-#ifndef LEX_AT
-/* We define this macro to generate a fixup for a data allocation pseudo-op. */
-#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) maxq20_cons_fix_new (FRAG,OFF,LEN,EXP)
-extern void maxq20_cons_fix_new (fragS *, unsigned int, unsigned int, expressionS *);
-#endif
-
-/* Define md_number_to_chars as the appropriate standard big endian or This
- should just call either `number_to_chars_bigendian' or
- `number_to_chars_littleendian', whichever is appropriate. On targets like
- the MIPS which support options to change the endianness, which function to
- call is a runtime decision. On other targets, `md_number_to_chars' can be
- a simple macro. */
-#define md_number_to_chars maxq_number_to_chars
-extern void maxq_number_to_chars (char *, valueT, int);
-
-/* If this macro is defined, it is a pointer to a NULL terminated list of
- characters which may appear in an operand. GAS already assumes that all
- alphanumeric characters, and '$', '.', and '_' may appear in an
- operand("symbol_char"in app.c). This macro may be defined to treat
- additional characters as appearing in an operand. This affects the way in
- which GAS removes whitespaces before passing the string to md_assemble. */
-#define tc_symbol_chars_extra_symbol_chars
-
-/* Define away the call to md_operand in the expression parsing code. This is
- called whenever the expression parser can't parse the input and gives the
- assembler backend a chance to deal with it instead. */
-#define md_operand(x)
-
-#define MAX_OPERANDS 2 /* Max operands per instruction. */
-#define MAX_IMMEDIATE_OPERANDS 1 /* Max immediate operands per instruction. */
-#define MAX_MEMORY_OPERANDS 1 /* Max memory operands per instruction. */
-
-/* Define the prefix we are using while trying to use an immediate value in
- an instruction. e.g move A[0], #03h. */
-#define IMMEDIATE_PREFIX '#'
-
-#define ABSOLUTE_PREFIX '@'
-
-/* This here defines the opcode of the nop operation on the MAXQ. We did
- declare it here when we tried to fill the align bites with nop's but GAS
- only expects nop's to be single byte instruction. */
-#define NOP_OPCODE (char)0xDA3A
-
-#define SIZE_OF_PM sizeof(pmodule) /* Size of the structure. */
-
-#endif /* TC_MAXQ_H */
ac_fn_c_check_decl ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $2 is declared" >&5
-$as_echo_n "checking whether $2 is declared... " >&6; }
+ as_decl_name=`echo $2|sed 's/ *(.*//'`
+ as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
+$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
$as_echo_n "(cached) " >&6
else
int
main ()
{
-#ifndef $2
- (void) $2;
+#ifndef $as_decl_name
+#ifdef __cplusplus
+ (void) $as_decl_use;
+#else
+ (void) $as_decl_name;
+#endif
#endif
;
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 11190 "configure"
+#line 11196 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 11296 "configure"
+#line 11302 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
m680[012346]0) cpu_type=m68k ;;
m6811|m6812|m68hc12) cpu_type=m68hc11 ;;
m683??) cpu_type=m68k ;;
- maxq) cpu_type=maxq ;;
mep) cpu_type=mep endian=little ;;
microblaze*) cpu_type=microblaze ;;
mips*el) cpu_type=mips endian=little ;;
m68k-*-openbsd*) fmt=aout em=nbsd bfd_gas=yes ;;
m68k-*-psos*) fmt=elf em=psos;;
- maxq-*-coff) fmt=coff bfd_gas=yes ;;
-
mep-*-elf) fmt=elf ;;
mcore-*-elf) fmt=elf ;;
config/tc-m68hc11.h
config/tc-m68k.c
config/tc-m68k.h
-config/tc-maxq.c
-config/tc-maxq.h
config/tc-mcore.c
config/tc-mcore.h
config/tc-mep.c
config/tc-pj.h
config/tc-ppc.c
config/tc-ppc.h
+config/tc-rx.c
+config/tc-rx.h
config/tc-s390.c
config/tc-s390.h
config/tc-score.c
config/tc-tic4x.h
config/tc-tic54x.c
config/tc-tic54x.h
+config/tc-tic6x.c
+config/tc-tic6x.h
config/tc-v850.c
config/tc-v850.h
config/tc-vax.c
+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * gas/maxq10/maxq10.exp: Delete file.
+ * gas/maxq10/bits.d, * gas/maxq10/bits.s, * gas/maxq10/call.d,
+ * gas/maxq10/call.s, * gas/maxq10/data.s, * gas/maxq10/data2.d,
+ * gas/maxq10/data2.s, * gas/maxq10/data3.d, * gas/maxq10/data3.s,
+ * gas/maxq10/err.s, * gas/maxq10/jump.d, * gas/maxq10/jump.s,
+ * gas/maxq10/logical.d, * gas/maxq10/logical.s, * gas/maxq10/math.d,
+ * gas/maxq10/math.s, * gas/maxq10/pmtest.d, * gas/maxq10/pmtest.s,
+ * gas/maxq10/range.d, * gas/maxq10/range.s: Likewise.
+ * gas/maxq20/maxq20.exp: Delete file.
+ * gas/maxq20/bits.d, * gas/maxq20/bits.s, * gas/maxq20/call.d,
+ * gas/maxq20/call.s, * gas/maxq20/data1.d, * gas/maxq20/data1.s,
+ * gas/maxq20/data2.d, * gas/maxq20/data2.s, * gas/maxq20/data3.d,
+ * gas/maxq20/data3.s, * gas/maxq20/jump.d, * gas/maxq20/jump.s,
+ * gas/maxq20/jzimm.d, * gas/maxq20/jzimm.s, * gas/maxq20/logical.d,
+ * gas/maxq20/logical.s, * gas/maxq20/math.d, * gas/maxq20/math.s,
+ * gas/maxq20/pfx2.s, * gas/maxq20/pmtest.d, * gas/maxq20/pmtest.s,
+ * gas/maxq20/pxf0.s, * gas/maxq20/range.d,
+ * gas/maxq20/range.s: Likewise.
+ * gas/all/gas.exp: Remove references to maxq.
+
2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/neon-ldst-align-bad.l: Update for Neon alignment syntax fix.
# This is usually revealed by the error message:
# symbol `sym' required but not present
setup_xfail "*arm*-*-*aout*" "*arm*-*-*coff" \
- "*arm*-*-pe" "m68hc*-*-*" "maxq-*-*" \
+ "*arm*-*-pe" "m68hc*-*-*" \
"rx-*-*" "vax*-*-*" "z8k-*-*"
run_dump_test redef2
setup_xfail "*-*-aix*" "*-*-coff" "*-*-cygwin" "*-*-mingw*" "*-*-pe*" \
"bfin-*-*" "hppa*-*-hpux*" \
- "m68hc*-*-*" "maxq-*-*" "or32-*-*" \
+ "m68hc*-*-*" "or32-*-*" \
"rx-*-*" "vax*-*-*" "z8k-*-*"
run_dump_test redef3
gas_test_error "redef4.s" "" ".set for symbol already used as label"
+++ /dev/null
-#
-# MAXQ10 tests
-#
-proc gas_64_check { } {
- global NM
- global NMFLAGS
-
- set status [gas_host_run "$NM $NMFLAGS --help" ""]
- return [regexp "targets:.*maxq" [lindex $status 1]]
-}
-
-proc gas_32_check { } {
- global NM
- global NMFLAGS
- global srcdir
-
- set status [gas_host_run "$NM $NMFLAGS --help" ""]
- return [regexp "targets:.*maxq" [lindex $status 1]]
-}
-
-if [expr ([istarget "maxq-*-*"] || [istarget "maxq-coff-*"]) && [gas_32_check]] then {
-
- global ASFLAGS
- set old_ASFLAGS "$ASFLAGS"
- set ASFLAGS "$ASFLAGS -MAXQ10"
-
- run_dump_test "range"
- run_dump_test "data3"
- run_dump_test "data2"
- run_dump_test "call"
- run_dump_test "jump"
- run_dump_test "logical"
- run_dump_test "math"
- run_dump_test "bits"
-
- set ASFLAGS "$old_ASFLAGS"
-}
-
+++ /dev/null
-#
-# MAXQ20 tests
-#
-proc gas_64_check { } {
- global NM
- global NMFLAGS
- global srcdir
-
- set status [gas_host_run "$NM $NMFLAGS --help" ""]
- return [regexp "targets:.*maxq" [lindex $status 1]]
-}
-
-proc gas_32_check { } {
- global NM
- global NMFLAGS
- global srcdir
-
- set status [gas_host_run "$NM $NMFLAGS --help" ""]
- return [regexp "targets:.*maxq" [lindex $status 1]]
-}
-
-
-if [expr ([istarget "maxq-*-*"] || [istarget "maxq-coff-*-*"]) && [gas_32_check]] then {
-
- global ASFLAGS
- set old_ASFLAGS "$ASFLAGS"
- set ASFLAGS "$ASFLAGS"
-
- run_dump_test "range"
- run_dump_test "data3"
- run_dump_test "data2"
- run_dump_test "call"
- run_dump_test "jump"
- run_dump_test "logical"
- run_dump_test "math"
- run_dump_test "bits"
- run_dump_test "data1"
- run_dump_test "jzimm"
-
- set ASFLAGS "$old_ASFLAGS"
-}
-
+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * dis-asm.h: Remove references to maxq.
+
2010-06-21 Rafael Espindola <espindola@google.com>
* plugin-api.h (ld_plugin_set_extra_library_path): New.
+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * maxq.h: Delete file.
+
2010-04-15 Nick Clifton <nickc@redhat.com>
* alpha.h: Update copyright notice to use GPLv3.
+++ /dev/null
-/* COFF spec for MAXQ
-
- Copyright 2004, 2005, 2010 Free Software Foundation, Inc.
-
- This program is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published by the Free
- Software Foundation; either version 3 of the License, or (at your option)
- any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
-
- Contributed by Vineet Sharma(vineets@noida.hcltech.com) Inderpreet
- S.(inderpreetb@noida.hcltech.com) HCL Technologies Ltd. */
-
-#define L_LNNO_SIZE 2
-
-#include "coff/external.h"
-
-/* Bits for f_flags: F_RELFLG relocation info stripped from file F_EXEC file
- is executable (no unresolved external references) F_LNNO line numbers
- stripped from file F_LSYMS local symbols stripped from file. */
-
-#define F_RELFLG (0x0001)
-#define F_EXEC (0x0002)
-#define F_LNNO (0x0004)
-#define F_LSYMS (0x0008)
-
-/* Variant Specific Flags for MAXQ10 and MAXQ20. */
-#define F_MAXQ10 (0x0030)
-#define F_MAXQ20 (0x0040)
-
-#define F_MACHMASK (0x00F0)
-
-/* Magic numbers for maxq. */
-#define MAXQ20MAGIC 0xa0
-#define MAXQ20BADMAG(x) (((x).f_magic != MAXQ20MAGIC))
-#define BADMAG(x) MAXQ20BADMAG (x)
-
-/* Relocation information declaration and related definitions. */
-struct external_reloc
-{
- char r_vaddr[4]; /* (Virtual) address of reference. */
- char r_symndx[4]; /* Index into symbol table. */
- char r_type[2]; /* Relocation type. */
- char r_offset[2]; /* Addend. */
-};
-
-#define RELOC struct external_reloc
-#define RELSZ (10 + 2) /* sizeof (RELOC) */
extern int print_insn_m68hc12 (bfd_vma, disassemble_info *);
extern int print_insn_m68k (bfd_vma, disassemble_info *);
extern int print_insn_m88k (bfd_vma, disassemble_info *);
-extern int print_insn_maxq_big (bfd_vma, disassemble_info *);
-extern int print_insn_maxq_little (bfd_vma, disassemble_info *);
extern int print_insn_mcore (bfd_vma, disassemble_info *);
extern int print_insn_mep (bfd_vma, disassemble_info *);
extern int print_insn_microblaze (bfd_vma, disassemble_info *);
+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * maxq.h: Delete file.
+
2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
* ppc.h (PPC_OPCODE_E500): Define.
+++ /dev/null
-/* maxq.h -- Header file for MAXQ opcode table.
-
- Copyright (C) 2004, 2010 Free Software Foundation, Inc.
-
- This file is part of GDB, GAS, and the GNU binutils.
-
- Written by Vineet Sharma(vineets@noida.hcltech.com)
- Inderpreet Singh (inderpreetb@noida.hcltech.com)
-
- GDB, GAS, and the GNU binutils are free software; you can redistribute
- them and/or modify them under the terms of the GNU General Public License
- as published by the Free Software Foundation; either version 3, or (at
- your option) any later version.
-
- GDB, GAS, and the GNU binutils are distributed in the hope that they will
- be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
- Public License for more details.
-
- You should have received a copy of the GNU General Public License along
- with this file; see the file COPYING3. If not, write to the Free Software
- Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-
-#ifndef _MAXQ20_H_
-#define _MAXQ20_H_
-
-/* This file contains the opcode table for the MAXQ10/20 processor. The table
- has been designed on the lines of the SH processor with the following
- fields:
- (1) Instruction Name
- (2) Instruction arguments description
- (3) Description of the breakup of the opcode (1+7+8|8+8|1+4+4|1+7+1+3+4
- |1+3+4+1+3+4|1+3+4+8|1+1+2+4+8)
- (4) Architecture supported
-
- The Register table is also defined. It contains the following fields
- (1) Register name
- (2) Module Number
- (3) Module Index
- (4) Opcode
- (5) Regtype
-
- The Memory access table is defined containing the various opcodes for
- memory access containing the following fields
- (1) Memory access Operand Name
- (2) Memory access Operand opcode. */
-
-# define MAXQ10 0x0001
-# define MAXQ20 0x0002
-# define MAX (MAXQ10 | MAXQ20)
-
-/* This is for the NOP instruction Specify : 1st bit : NOP_FMT 1st byte:
- NOP_DST 2nd byte: NOP_SRC. */
-# define NOP_FMT 1
-# define NOP_SRC 0x3A
-# define NOP_DST 0x5A
-
-typedef enum
-{
- ZEROBIT = 0x1, /* A zero followed by 3 bits. */
- ONEBIT = 0x2, /* A one followed by 3 bits. */
- REG = 0x4, /* Register. */
- MEM = 0x8, /* Memory access. */
- IMM = 0x10, /* Immediate value. */
- DISP = 0x20, /* Displacement value. */
- BIT = 0x40, /* Bit value. */
- FMT = 0x80, /* The format bit. */
- IMMBIT = 0x100, /* An immediate bit. */
- FLAG = 0x200, /* A Flag. */
- DATA = 0x400, /* Symbol in the data section. */
- BIT_BUCKET = 0x800, /* FOr BIT BUCKET. */
-}
-UNKNOWN_OP;
-
-typedef enum
-{
- NO_ARG = 0,
- A_IMM = 0x01, /* An 8 bit immediate value. */
- A_REG = 0x2, /* An 8 bit source register. */
- A_MEM = 0x4, /* A 7 bit destination register. */
- FLAG_C = 0x8, /* Carry Flag. */
- FLAG_NC = 0x10, /* No Carry (~C) flag. */
- FLAG_Z = 0x20, /* Zero Flag. */
- FLAG_NZ = 0x40, /* Not Zero Flag. */
- FLAG_S = 0x80, /* Sign Flag. */
- FLAG_E = 0x100, /* Equals Flag. */
- FLAG_NE = 0x200, /* Not Equal Flag. */
- ACC_BIT = 0x400, /* One of the 16 accumulator bits of the form Acc.<b>. */
- DST_BIT = 0x800, /* One of the 8 bits of the specified SRC. */
- SRC_BIT = 0x1000, /* One of the 8 bits of the specified source register. */
- A_BIT_0 = 0x2000, /* #0. */
- A_BIT_1 = 0x4000, /* #1. */
- A_DISP = 0x8000, /* Displacement Operand. */
- A_DATA = 0x10000, /* Data in the data section. */
- A_BIT_BUCKET = 0x200000,
-}
-MAX_ARG_TYPE;
-
-typedef struct
-{
- char * name; /* Name of the instruction. */
- unsigned int op_number; /* Operand Number or the number of operands. */
- MAX_ARG_TYPE arg[2]; /* Types of operands. */
- int format; /* Format bit. */
- int dst[2]; /* Destination in the move instruction. */
- int src[2]; /* Source in the move instruction. */
- int arch; /* The Machine architecture. */
- unsigned int instr_id; /* Added for decode and dissassembly. */
-}
-MAXQ20_OPCODE_INFO;
-
-/* Structure for holding opcodes of the same name. */
-typedef struct
-{
- const MAXQ20_OPCODE_INFO *start; /* The first opcode. */
- const MAXQ20_OPCODE_INFO *end; /* The last opcode. */
-}
-MAXQ20_OPCODES;
-
-/* The entry into the hash table will be of the type MAXX_OPCODES. */
-
-/* The definition of the table. */
-const MAXQ20_OPCODE_INFO op_table[] =
-{
- /* LOGICAL OPERATIONS */
- /* AND src : f001 1010 ssss ssss */
- {"AND", 1, {A_IMM | A_REG | A_MEM | A_DISP, 0}, FMT, {0x1a, 0},
- {REG | MEM | IMM | DISP, 0}, MAX, 0x11},
- /* AND Acc.<b> : 1111 1010 bbbb 1010 */
- {"AND", 1, {ACC_BIT, 0}, 1, {0x1a, 0}, {BIT, 0xa}, MAX, 0x39},
- /* OR src : f010 1010 ssss ssss */
- {"OR", 1, {A_IMM | A_REG | A_MEM | A_DISP, 0}, FMT, {0x2a, 0},
- {REG | MEM | IMM | DISP, 0}, MAX, 0x12},
- /* OR Acc.<b> : 1010 1010 bbbb 1010 */
- {"OR", 1, {ACC_BIT, 0}, 1, {0x2a, 0}, {BIT, 0xa}, MAX, 0x3A},
- /* XOR src : f011 1010 ssss ssss */
- {"XOR", 1, {A_IMM | A_REG | A_MEM | A_DISP, 0}, FMT, {0x3a, 0},
- {REG | MEM | IMM | DISP, 0}, MAX, 0x13},
- /* XOR Acc.<b> : 1011 1010 bbbb 1010 */
- {"XOR", 1, {ACC_BIT, 0}, 1, {0x3a, 0}, {BIT, 0xa}, MAX, 0x3B},
- /* LOGICAL OPERATIONS INVOLVING ONLY THE ACCUMULATOR */
- /* CPL : 1000 1010 0001 1010 */
- {"CPL", 0, {0, 0}, 1, {0x0a, 0}, {0x1a, 0}, MAX, 0x21},
- /* CPL C : 1101 1010 0010 1010 */
- {"CPL", 1, {FLAG_C, 0}, 1, {0x5a, 0}, {0x2a, 0}, MAX, 0x3D},
- /* NEG : 1000 1010 1001 1010 */
- {"NEG", 0, {0, 0}, 1, {0x0a, 0}, {0x9a, 0}, MAX, 0x29},
- /* SLA : 1000 1010 0010 1010 */
- {"SLA", 0, {0, 0}, 1, {0x0a, 0}, {0x2a, 0}, MAX, 0x22},
- /* SLA2: 1000 1010 0011 1010 */
- {"SLA2", 0, {0, 0}, 1, {0x0a, 0}, {0x3a, 0}, MAX, 0x23},
- /* SLA4: 1000 1010 0110 1010 */
- {"SLA4", 0, {0, 0}, 1, {0x0a, 0}, {0x6a, 0}, MAX, 0x26},
- /* RL : 1000 1010 0100 1010 */
- {"RL", 0, {0, 0}, 1, {0x0a, 0}, {0x4a, 0}, MAX, 0x24},
- /* RLC : 1000 1010 0101 1010 */
- {"RLC", 0, {0, 0}, 1, {0x0a, 0}, {0x5a, 0}, MAX, 0x25},
- /* SRA : 1000 1010 1111 1010 */
- {"SRA", 0, {0, 0}, 1, {0x0a, 0}, {0xfa, 0}, MAX, 0x2F},
- /* SRA2: 1000 1010 1110 1010 */
- {"SRA2", 0, {0, 0}, 1, {0x0a, 0}, {0xea, 0}, MAX, 0x2E},
- /* SRA4: 1000 1010 1011 1010 */
- {"SRA4", 0, {0, 0}, 1, {0x0a, 0}, {0xba, 0}, MAX, 0x2B},
- /* SR : 1000 1010 1010 1010 */
- {"SR", 0, {0, 0}, 1, {0x0a, 0}, {0xaa, 0}, MAX, 0x2A},
- /* RR : 1000 1010 1100 1010 */
- {"RR", 0, {0, 0}, 1, {0x0a, 0}, {0xca, 0}, MAX, 0x2C},
- /* RRC : 1000 1010 1101 1010 */
- {"RRC", 0, {0, 0}, 1, {0x0a, 0}, {0xda, 0}, MAX, 0x2D},
- /* MATH OPERATIONS */
- /* ADD src : f100 1010 ssss ssss */
- {"ADD", 1, {A_IMM | A_REG | A_MEM | A_DISP, 0}, FMT, {0x4a, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0x14},
- /* ADDC src : f110 1010 ssss ssss */
- {"ADDC", 1, {A_IMM | A_REG | A_MEM | A_DISP, 0}, FMT, {0x6a, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0x16},
- /* SUB src : f101 1010 ssss ssss */
- {"SUB", 1, {A_IMM | A_REG | A_MEM | A_DISP, 0}, FMT, {0x5a, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0x15},
- /* SUBB src : f111 1010 ssss ssss */
- {"SUBB", 1, {A_IMM | A_REG | A_MEM | A_DISP, 0}, FMT, {0x7a, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0x17},
- /* BRANCHING OPERATIONS */
-
- /* DJNZ LC[0] src: f100 1101 ssss ssss */
- {"DJNZ", 2, {A_REG, A_IMM | A_REG | A_MEM | A_DISP}, FMT, {0x4d, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0xA4},
- /* DJNZ LC[1] src: f101 1101 ssss ssss */
- {"DJNZ", 2, {A_REG, A_IMM | A_REG | A_MEM | A_DISP}, FMT, {0x5d, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0xA5},
- /* CALL src : f011 1101 ssss ssss */
- {"CALL", 1, {A_IMM | A_REG | A_MEM | A_DISP, 0}, FMT, {0x3d, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0xA3},
- /* JUMP src : f000 1100 ssss ssss */
- {"JUMP", 1, {A_IMM | A_REG | A_MEM | A_DISP, 0}, FMT, {0x0c, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0x50},
- /* JUMP C,src : f010 1100 ssss ssss */
- {"JUMP", 2, {FLAG_C, A_IMM | A_REG | A_MEM | A_DISP}, FMT, {0x2c, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0x52},
- /* JUMP NC,src: f110 1100 ssss ssss */
- {"JUMP", 2, {FLAG_NC, A_IMM | A_REG | A_MEM | A_DISP}, FMT, {0x6c, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0x56},
- /* JUMP Z,src : f001 1100 ssss ssss */
- {"JUMP", 2, {FLAG_Z, A_IMM | A_REG | A_MEM | A_DISP}, FMT, {0x1c, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0x51},
- /* JUMP NZ,src: f101 1100 ssss ssss */
- {"JUMP", 2, {FLAG_NZ, A_IMM | A_REG | A_MEM | A_DISP}, FMT, {0x5c, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0x55},
- /* JUMP E,src : 0011 1100 ssss ssss */
- {"JUMP", 2, {FLAG_E, A_IMM | A_DISP}, 0, {0x3c, 0}, {IMM, 0}, MAX, 0x53},
- /* JUMP NE,src: 0111 1100 ssss ssss */
- {"JUMP", 2, {FLAG_NE, A_IMM | A_DISP}, 0, {0x7c, 0}, {IMM, 0}, MAX, 0x57},
- /* JUMP S,src : f100 1100 ssss ssss */
- {"JUMP", 2, {FLAG_S, A_IMM | A_REG | A_MEM | A_DISP}, FMT, {0x4c, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0x54},
- /* RET : 1000 1100 0000 1101 */
- {"RET", 0, {0, 0}, 1, {0x0c, 0}, {0x0d, 0}, MAX, 0x68},
- /* RET C : 1010 1100 0000 1101 */
- {"RET", 1, {FLAG_C, 0}, 1, {0x2c, 0}, {0x0d, 0}, MAX, 0x6A},
- /* RET NC : 1110 1100 0000 1101 */
- {"RET", 1, {FLAG_NC, 0}, 1, {0x6c, 0}, {0x0d, 0}, MAX, 0x6E},
- /* RET Z : 1001 1100 0000 1101 */
- {"RET", 1, {FLAG_Z, 0}, 1, {0x1c, 0}, {0x0d, 0}, MAX, 0x69},
- /* RET NZ : 1101 1100 0000 1101 */
- {"RET", 1, {FLAG_NZ, 0}, 1, {0x5c, 0}, {0x0d, 0}, MAX, 0x6D},
- /* RET S : 1100 1100 0000 1101 */
- {"RET", 1, {FLAG_S, 0}, 1, {0x4c, 0}, {0x0d, 0}, MAX, 0x6C},
- /* RETI : 1000 1100 1000 1101 */
- {"RETI", 0, {0, 0}, 1, {0x0c, 0}, {0x8d, 0}, MAX, 0x78},
- /* ADDED ACCORDING TO NEW SPECIFICATION */
-
- /* RETI C : 1010 1100 1000 1101 */
- {"RETI", 1, {FLAG_C, 0}, 1, {0x2c, 0}, {0x8d, 0}, MAX, 0x7A},
- /* RETI NC : 1110 1100 1000 1101 */
- {"RETI", 1, {FLAG_NC, 0}, 1, {0x6c, 0}, {0x8d, 0}, MAX, 0x7E},
- /* RETI Z : 1001 1100 1000 1101 */
- {"RETI", 1, {FLAG_Z, 0}, 1, {0x1c, 0}, {0x8d, 0}, MAX, 0x79},
- /* RETI NZ : 1101 1100 1000 1101 */
- {"RETI", 1, {FLAG_NZ, 0}, 1, {0x5c, 0}, {0x8d, 0}, MAX, 0x7D},
- /* RETI S : 1100 1100 1000 1101 */
- {"RETI", 1, {FLAG_S, 0}, 1, {0x4c, 0}, {0x8d, 0}, MAX, 0x7C},
- /* MISCELLANEOUS INSTRUCTIONS */
- /* CMP src : f111 1000 ssss ssss */
- {"CMP", 1, {A_REG | A_IMM | A_MEM | A_DISP, 0}, FMT, {0x78, 0},
- {REG | MEM | IMM | DISP, 0}, MAX, 0xD7},
- /* DATA TRANSFER OPERATIONS */
- /* XCH : 1000 1010 1000 1010 */
- {"XCH", 0, {0, 0}, 1, {0x0a, 0}, {0x8a, 0}, MAXQ20, 0x28},
- /* XCHN : 1000 1010 0111 1010 */
- {"XCHN", 0, {0, 0}, 1, {0x0a, 0}, {0x7a, 0}, MAX, 0x27},
- /* PUSH src : f000 1101 ssss ssss */
- {"PUSH", 1, {A_REG | A_IMM | A_MEM | A_DISP, 0}, FMT, {0x0d, 0},
- {IMM | REG | MEM | DISP, 0}, MAX, 0xA0},
- /* POP dst : 1ddd dddd 0000 1101 */
- {"POP", 1, {A_REG, 0}, 1, {REG, 0}, {0x0d, 0}, MAX, 0xB0},
- /* Added according to new spec */
- /* POPI dst : 1ddd dddd 1000 1101 */
- {"POPI", 1, {A_REG, 0}, 1, {REG, 0}, {0x8d, 0}, MAX, 0xC0},
- /* MOVE dst,src: fddd dddd ssss ssss */
- {"MOVE", 2, {A_REG | A_MEM, A_REG | A_IMM | A_MEM | A_DATA | A_DISP}, FMT,
- {REG | MEM, 0}, {REG | IMM | MEM | DATA | A_DISP, 0}, MAX, 0x80},
- /* BIT OPERATIONS */
- /* MOVE C,Acc.<b> : 1110 1010 bbbb 1010 */
- {"MOVE", 2, {FLAG_C, ACC_BIT}, 1, {0x6a, 0}, {BIT, 0xa}, MAX, 0x3E},
- /* MOVE C,#0 : 1101 1010 0000 1010 */
- {"MOVE", 2, {FLAG_C, A_BIT_0}, 1, {0x5a, 0}, {0x0a, 0}, MAX, 0x3D},
- /* MOVE C,#1 : 1101 1010 0001 1010 */
- {"MOVE", 2, {FLAG_C, A_BIT_1}, 1, {0x5a, 0}, {0x1a, 0}, MAX, 0x3D},
- /* MOVE Acc.<b>,C : 1111 1010 bbbb 1010 */
- {"MOVE", 2, {ACC_BIT, FLAG_C}, 1, {0x7a, 0}, {BIT, 0xa}, MAX, 0x3F},
- /* MOVE dst.<b>,#0 : 1ddd dddd 0bbb 0111 */
- {"MOVE", 2, {DST_BIT, A_BIT_0}, 1, {REG, 0}, {ZEROBIT, 0x7}, MAX, 0x40},
- /* MOVE dst.<b>,#1 : 1ddd dddd 1bbb 0111 */
- {"MOVE", 2, {DST_BIT, A_BIT_1}, 1, {REG, 0}, {ONEBIT, 0x7}, MAX, 0x41},
- /* MOVE C,src.<b> : fbbb 0111 ssss ssss */
- {"MOVE", 2, {FLAG_C, SRC_BIT}, FMT, {BIT, 0x7}, {REG, 0}, MAX, 0x97},
- /* NOP : 1101 1010 0011 1010 */
- {"NOP", 0, {0, 0}, NOP_FMT, {NOP_DST, 0}, {NOP_SRC, 0}, MAX, 0x3D},
- {NULL, 0, {0, 0}, 0, {0, 0}, {0, 0}, 0, 0x00}
-};
-
-/* All the modules. */
-
-#define MOD0 0x0
-#define MOD1 0x1
-#define MOD2 0x2
-#define MOD3 0x3
-#define MOD4 0x4
-#define MOD5 0x5
-#define MOD6 0x6
-#define MOD7 0x7
-#define MOD8 0x8
-#define MOD9 0x9
-#define MODA 0xa
-#define MODB 0xb
-#define MODC 0xc
-#define MODD 0xd
-#define MODE 0xe
-#define MODF 0xf
-
-/* Added according to new specification. */
-#define MOD10 0x10
-#define MOD11 0x11
-#define MOD12 0x12
-#define MOD13 0x13
-#define MOD14 0x14
-#define MOD15 0x15
-#define MOD16 0x16
-#define MOD17 0x17
-#define MOD18 0x18
-#define MOD19 0x19
-#define MOD1A 0x1a
-#define MOD1B 0x1b
-#define MOD1C 0x1c
-#define MOD1D 0x1d
-#define MOD1E 0x1e
-#define MOD1F 0x1f
-
-/* - Peripheral Register Modules - */
-/* Serial Register Modules. */
-#define CTRL MOD8 /* For the module containing the control registers. */
-#define ACC MOD9 /* For the module containing the 16 accumulators. */
-#define Act_ACC MODA /* For the module containing the active accumulator. */
-#define PFX MODB /* For the module containing the prefix registers. */
-#define IP MODC /* For the module containing the instruction pointer register. */
-#define SPIV MODD /* For the module containing the stack pointer and the interrupt vector. */
-#define LC MODD /* For the module containing the loop counters and HILO registers. */
-#define DP MODF /* For the module containig the data pointer registers. */
-
-/* Register Types. */
-typedef enum _Reg_type
-{ Reg_8R, /* 8 bit register. read only. */
- Reg_16R, /* 16 bit register, read only. */
- Reg_8W, /* 8 bit register, both read and write. */
- Reg_16W /* 16 bit register, both read and write. */
-}
-Reg_type;
-
-/* Register Structure. */
-typedef struct reg
-{
- char *reg_name; /* Register name. */
- short int Mod_name; /* The module name. */
- short int Mod_index; /* The module index. */
- int opcode; /* The opcode of the register. */
- Reg_type rtype; /* 8 bit/16 bit and read only/read write. */
- int arch; /* The Machine architecture. */
-}
-reg_entry;
-
-reg_entry *new_reg_table = NULL;
-int num_of_reg = 0;
-
-typedef struct
-{
- char *rname;
- int rindex;
-}
-reg_index;
-
-/* Register Table description. */
-reg_entry system_reg_table[] =
-{
- /* Serial Registers */
- /* MODULE 8 Registers : I call them the control registers. */
- /* Accumulator Pointer CTRL[0h] */
- {
- "AP", CTRL, 0x0, 0x00 | CTRL, Reg_8W, MAX},
- /* Accumulator Pointer Control Register : CTRL[1h] */
-
- {
- "APC", CTRL, 0x1, 0x10 | CTRL, Reg_8W, MAX},
- /* Processor Status Flag Register CTRL[4h] Note: Bits 6 and 7 read only */
- {
- "PSF", CTRL, 0x4, 0x40 | CTRL, Reg_8W, MAX},
- /* Interrupt and Control Register : CTRL[5h] */
- {
- "IC", CTRL, 0x5, 0x50 | CTRL, Reg_8W, MAX},
- /* Interrupt Mask Register : CTRL[6h] */
- {
- "IMR", CTRL, 0x6, 0x60 | CTRL, Reg_8W, MAX},
- /* Interrupt System Control : CTRL[8h] */
- {
- "SC", CTRL, 0x8, 0x80 | CTRL, Reg_8W, MAX},
- /* Interrupt Identification Register : CTRL[Bh] */
- {
- "IIR", CTRL, 0xb, 0xb0 | CTRL, Reg_8R, MAX},
- /* System Clock Control Register : CTRL[Eh] Note: Bit 5 is read only */
- {
- "CKCN", CTRL, 0xe, 0xe0 | CTRL, Reg_8W, MAX},
- /* Watchdog Control Register : CTRL[Fh] */
- {
- "WDCN", CTRL, 0xf, 0xf0 | CTRL, Reg_8W, MAX},
- /* The 16 accumulator registers : ACC[0h-Fh] */
- {
- "A[0]", ACC, 0x0, 0x00 | ACC, Reg_16W, MAXQ20},
- {
- "A[1]", ACC, 0x1, 0x10 | ACC, Reg_16W, MAXQ20},
- {
- "A[2]", ACC, 0x2, 0x20 | ACC, Reg_16W, MAXQ20},
- {
- "A[3]", ACC, 0x3, 0x30 | ACC, Reg_16W, MAXQ20},
- {
- "A[4]", ACC, 0x4, 0x40 | ACC, Reg_16W, MAXQ20},
- {
- "A[5]", ACC, 0x5, 0x50 | ACC, Reg_16W, MAXQ20},
- {
- "A[6]", ACC, 0x6, 0x60 | ACC, Reg_16W, MAXQ20},
- {
- "A[7]", ACC, 0x7, 0x70 | ACC, Reg_16W, MAXQ20},
- {
- "A[8]", ACC, 0x8, 0x80 | ACC, Reg_16W, MAXQ20},
- {
- "A[9]", ACC, 0x9, 0x90 | ACC, Reg_16W, MAXQ20},
- {
- "A[10]", ACC, 0xa, 0xa0 | ACC, Reg_16W, MAXQ20},
- {
- "A[11]", ACC, 0xb, 0xb0 | ACC, Reg_16W, MAXQ20},
- {
- "A[12]", ACC, 0xc, 0xc0 | ACC, Reg_16W, MAXQ20},
- {
- "A[13]", ACC, 0xd, 0xd0 | ACC, Reg_16W, MAXQ20},
- {
- "A[14]", ACC, 0xe, 0xe0 | ACC, Reg_16W, MAXQ20},
- {
- "A[15]", ACC, 0xf, 0xf0 | ACC, Reg_16W, MAXQ20},
- /* The Active Accumulators : Act_Acc[0h-1h] */
- {
- "ACC", Act_ACC, 0x0, 0x00 | Act_ACC, Reg_16W, MAXQ20},
- {
- "A[AP]", Act_ACC, 0x1, 0x10 | Act_ACC, Reg_16W, MAXQ20},
- /* The 16 accumulator registers : ACC[0h-Fh] */
- {
- "A[0]", ACC, 0x0, 0x00 | ACC, Reg_8W, MAXQ10},
- {
- "A[1]", ACC, 0x1, 0x10 | ACC, Reg_8W, MAXQ10},
- {
- "A[2]", ACC, 0x2, 0x20 | ACC, Reg_8W, MAXQ10},
- {
- "A[3]", ACC, 0x3, 0x30 | ACC, Reg_8W, MAXQ10},
- {
- "A[4]", ACC, 0x4, 0x40 | ACC, Reg_8W, MAXQ10},
- {
- "A[5]", ACC, 0x5, 0x50 | ACC, Reg_8W, MAXQ10},
- {
- "A[6]", ACC, 0x6, 0x60 | ACC, Reg_8W, MAXQ10},
- {
- "A[7]", ACC, 0x7, 0x70 | ACC, Reg_8W, MAXQ10},
- {
- "A[8]", ACC, 0x8, 0x80 | ACC, Reg_8W, MAXQ10},
- {
- "A[9]", ACC, 0x9, 0x90 | ACC, Reg_8W, MAXQ10},
- {
- "A[10]", ACC, 0xa, 0xa0 | ACC, Reg_8W, MAXQ10},
- {
- "A[11]", ACC, 0xb, 0xb0 | ACC, Reg_8W, MAXQ10},
- {
- "A[12]", ACC, 0xc, 0xc0 | ACC, Reg_8W, MAXQ10},
- {
- "A[13]", ACC, 0xd, 0xd0 | ACC, Reg_8W, MAXQ10},
- {
- "A[14]", ACC, 0xe, 0xe0 | ACC, Reg_8W, MAXQ10},
- {
- "A[15]", ACC, 0xf, 0xf0 | ACC, Reg_8W, MAXQ10},
- /* The Active Accumulators : Act_Acc[0h-1h] */
- {
- "A[AP]", Act_ACC, 0x1, 0x10 | Act_ACC, Reg_8W, MAXQ10},
- /* The Active Accumulators : Act_Acc[0h-1h] */
- {
- "ACC", Act_ACC, 0x0, 0x00 | Act_ACC, Reg_8W, MAXQ10},
- /* The Prefix Registers : PFX[0h,2h] */
- {
- "PFX[0]", PFX, 0x0, 0x00 | PFX, Reg_16W, MAX},
- {
- "PFX[1]", PFX, 0x1, 0x10 | PFX, Reg_16W, MAX},
- {
- "PFX[2]", PFX, 0x2, 0x20 | PFX, Reg_16W, MAX},
- {
- "PFX[3]", PFX, 0x3, 0x30 | PFX, Reg_16W, MAX},
- {
- "PFX[4]", PFX, 0x4, 0x40 | PFX, Reg_16W, MAX},
- {
- "PFX[5]", PFX, 0x5, 0x50 | PFX, Reg_16W, MAX},
- {
- "PFX[6]", PFX, 0x6, 0x60 | PFX, Reg_16W, MAX},
- {
- "PFX[7]", PFX, 0x7, 0x70 | PFX, Reg_16W, MAX},
- /* The Instruction Pointer Registers : IP[0h,8h] */
- {
- "IP", IP, 0x0, 0x00 | IP, Reg_16W, MAX},
- /* The Stack Pointer Registers : SPIV[1h,9h] */
- {
- "SP", SPIV, 0x1, 0x10 | SPIV, Reg_16W, MAX},
- /* The Interrupt Vector Registers : SPIV[2h,Ah] */
- {
- "IV", SPIV, 0x2, 0x20 | SPIV, Reg_16W, MAX},
- /* ADDED for New Specification */
-
- /* The Loop Counter Registers : LCHILO[0h-4h,8h-Bh] */
- {
- "LC[0]", LC, 0x6, 0x60 | LC, Reg_16W, MAX},
- {
- "LC[1]", LC, 0x7, 0x70 | LC, Reg_16W, MAX},
- /* MODULE Eh Whole Column has changed */
-
- {
- "OFFS", MODE, 0x3, 0x30 | MODE, Reg_8W, MAX},
- {
- "DPC", MODE, 0x4, 0x40 | MODE, Reg_16W, MAX},
- {
- "GR", MODE, 0x5, 0x50 | MODE, Reg_16W, MAX},
- {
- "GRL", MODE, 0x6, 0x60 | MODE, Reg_8W, MAX},
- {
- "BP", MODE, 0x7, 0x70 | MODE, Reg_16W, MAX},
- {
- "GRS", MODE, 0x8, 0x80 | MODE, Reg_16W, MAX},
- {
- "GRH", MODE, 0x9, 0x90 | MODE, Reg_8W, MAX},
- {
- "GRXL", MODE, 0xA, 0xA0 | MODE, Reg_8R, MAX},
- {
- "FP", MODE, 0xB, 0xB0 | MODE, Reg_16R, MAX},
- /* The Data Pointer registers : DP[3h,7h,Bh,Fh] */
- {
- "DP[0]", DP, 0x3, 0x30 | DP, Reg_16W, MAX},
- {
- "DP[1]", DP, 0x7, 0x70 | DP, Reg_16W, MAX},
-};
-typedef struct
-{
- char *name;
- int type;
-}
-match_table;
-
-#define GPIO0 0x00 /* Gerneral Purpose I/O Module 0. */
-#define GPIO1 0x01 /* Gerneral Purpose I/O Module 1. */
-#define RTC 0x00 /* Real Time Clock Module. */
-#define MAC 0x02 /* Hardware Multiplier Module. */
-#define SER0 0x02 /* Contains the UART Registers. */
-#define SPI 0x03 /* Serial Pheripheral Interface Module. */
-#define OWBM 0x03 /* One Wire Bus Module. */
-#define SER1 0x03 /* Contains the UART Registers. */
-#define TIMER20 0x03 /* Timer Counter Module 2. */
-#define TIMER21 0x04 /* Timer Counter Module 2. */
-#define JTAGD 0x03 /* In-Circuit Debugging Support. */
-#define LCD 0x03 /* LCD register Modules. */
-
-/* Plugable modules register table f. */
-
-reg_entry peripheral_reg_table[] =
-{
- /* -------- The GPIO Module Registers -------- */
- /* Port n Output Registers : GPIO[0h-4h] */
- {
- "PO0", GPIO0, 0x0, 0x00 | MOD0, Reg_8W, MAX},
- {
- "PO1", GPIO0, 0x1, 0x10 | MOD0, Reg_8W, MAX},
- {
- "PO2", GPIO0, 0x2, 0x20 | MOD0, Reg_8W, MAX},
- {
- "PO3", GPIO0, 0x3, 0x30 | MOD0, Reg_8W, MAX},
- /* External Interrupt Flag Register : GPIO[6h] */
- {
- "EIF0", GPIO0, 0x6, 0x60 | MOD0, Reg_8W, MAX},
- /* External Interrupt Enable Register : GPIO[7h] */
- {
- "EIE0", GPIO0, 0x7, 0x70 | MOD0, Reg_8W, MAX},
- /* Port n Input Registers : GPIO[8h-Bh] */
- {
- "PI0", GPIO0, 0x8, 0x80 | MOD0, Reg_8W, MAX},
- {
- "PI1", GPIO0, 0x9, 0x90 | MOD0, Reg_8W, MAX},
- {
- "PI2", GPIO0, 0xa, 0xa0 | MOD0, Reg_8W, MAX},
- {
- "PI3", GPIO0, 0xb, 0xb0 | MOD0, Reg_8W, MAX},
- {
- "EIES0", GPIO0, 0xc, 0xc0 | MOD0, Reg_8W, MAX},
- /* Port n Direction Registers : GPIO[Ch-Fh] */
- {
- "PD0", GPIO0, 0x10, 0x10 | MOD0, Reg_8W, MAX},
- {
- "PD1", GPIO0, 0x11, 0x11 | MOD0, Reg_8W, MAX},
- {
- "PD2", GPIO0, 0x12, 0x12 | MOD0, Reg_8W, MAX},
- {
- "PD3", GPIO0, 0x13, 0x13 | MOD0, Reg_8W, MAX},
- /* -------- Real Time Counter Module RTC -------- */
- /* RTC Control Register : [01h] */
- {
- "RCNT", RTC, 0x19, 0x19 | MOD0, Reg_16W, MAX},
- /* RTC Seconds High [02h] */
- {
- "RTSS", RTC, 0x1A, 0x1A | MOD0, Reg_8W, MAX},
- /* RTC Seconds Low [03h] */
- {
- "RTSH", RTC, 0x1b, 0x1b | MOD0, Reg_16W, MAX},
- /* RTC Subsecond Register [04h] */
- {
- "RTSL", RTC, 0x1C, 0x1C | MOD0, Reg_16W, MAX},
- /* RTC Alarm seconds high [05h] */
- {
- "RSSA", RTC, 0x1D, 0x1D | MOD0, Reg_8W, MAX},
- /* RTC Alarm seconds high [06h] */
- {
- "RASH", RTC, 0x1E, 0x1E | MOD0, Reg_8W, MAX},
- /* RTC Subsecond Alarm Register [07h] */
- {
- "RASL", RTC, 0x1F, 0x1F | MOD0, Reg_16W, MAX},
- /* -------- The GPIO Module Registers -------- */
- /* Port n Output Registers : GPIO[0h-4h] */
- {
- "PO4", GPIO1, 0x0, 0x00 | MOD1, Reg_8W, MAX},
- {
- "PO5", GPIO1, 0x1, 0x10 | MOD1, Reg_8W, MAX},
- {
- "PO6", GPIO1, 0x2, 0x20 | MOD1, Reg_8W, MAX},
- {
- "PO7", GPIO1, 0x3, 0x30 | MOD1, Reg_8W, MAX},
- /* External Interrupt Flag Register : GPIO[6h] */
- {
- "EIF1", GPIO0, 0x6, 0x60 | MOD1, Reg_8W, MAX},
- /* External Interrupt Enable Register : GPIO[7h] */
- {
- "EIE1", GPIO0, 0x7, 0x70 | MOD1, Reg_8W, MAX},
- /* Port n Input Registers : GPIO[8h-Bh] */
- {
- "PI4", GPIO1, 0x8, 0x80 | MOD1, Reg_8W, MAX},
- {
- "PI5", GPIO1, 0x9, 0x90 | MOD1, Reg_8W, MAX},
- {
- "PI6", GPIO1, 0xa, 0xa0 | MOD1, Reg_8W, MAX},
- {
- "PI7", GPIO1, 0xb, 0xb0 | MOD1, Reg_8W, MAX},
- {
- "EIES1", GPIO1, 0xc, 0xc0 | MOD1, Reg_8W, MAX},
- /* Port n Direction Registers : GPIO[Ch-Fh] */
- {
- "PD4", GPIO1, 0x10, 0x10 | MOD1, Reg_8W, MAX},
- {
- "PD5", GPIO1, 0x11, 0x11 | MOD1, Reg_8W, MAX},
- {
- "PD6", GPIO1, 0x12, 0x12 | MOD1, Reg_8W, MAX},
- {
- "PD7", GPIO1, 0x13, 0x13 | MOD1, Reg_8W, MAX},
-#if 0
- /* Supply Boltage Check Register */
- {
- "SVS", GPIO1, 0x1e, 0x1e | GPIO1, Reg_8W, MAX},
- /* Wake up output register */
- {
- "WK0", GPIO1, 0x1f, 0x1f | GPIO1, Reg_8W, MAX},
-#endif /* */
-
- /* -------- MAC Hardware multiplier module -------- */
- /* MAC Hardware Multiplier control register: [01h] */
- {
- "MCNT", MAC, 0x1, 0x10 | MOD2, Reg_8W, MAX},
- /* MAC Multiplier Operand A Register [02h] */
- {
- "MA", MAC, 0x2, 0x20 | MOD2, Reg_16W, MAX},
- /* MAC Multiplier Operand B Register [03h] */
- {
- "MB", MAC, 0x3, 0x30 | MOD2, Reg_16W, MAX},
- /* MAC Multiplier Accumulator 2 Register [04h] */
- {
- "MC2", MAC, 0x4, 0x40 | MOD2, Reg_16W, MAX},
- /* MAC Multiplier Accumulator 1 Register [05h] */
- {
- "MC1", MAC, 0x5, 0x50 | MOD2, Reg_16W, MAX},
- /* MAC Multiplier Accumulator 0 Register [06h] */
- {
- "MC0", MAC, 0x6, 0x60 | MOD2, Reg_16W, MAX},
- /* -------- The Serial I/O module SER -------- */
- /* UART registers */
- /* Serial Port Control Register : SER[6h] */
- {
- "SCON0", SER0, 0x6, 0x60 | MOD2, Reg_8W, MAX},
- /* Serial Data Buffer Register : SER[7h] */
- {
- "SBUF0", SER0, 0x7, 0x70 | MOD2, Reg_8W, MAX},
- /* Serial Port Mode Register : SER[4h] */
- {
- "SMD0", SER0, 0x8, 0x80 | MOD2, Reg_8W, MAX},
- /* Serial Port Phase Register : SER[4h] */
- {
- "PR0", SER1, 0x9, 0x90 | MOD2, Reg_16W, MAX},
- /* ------ LCD Display Module ---------- */
- {
- "LCRA", LCD, 0xd, 0xd0 | MOD2, Reg_16W, MAX},
- {
- "LCFG", LCD, 0xe, 0xe0 | MOD2, Reg_8W, MAX},
- {
- "LCD16", LCD, 0xf, 0xf0 | MOD2, Reg_8W, MAX},
- {
- "LCD0", LCD, 0x10, 0x10 | MOD2, Reg_8W, MAX},
- {
- "LCD1", LCD, 0x11, 0x11 | MOD2, Reg_8W, MAX},
- {
- "LCD2", LCD, 0x12, 0x12 | MOD2, Reg_8W, MAX},
- {
- "LCD3", LCD, 0x13, 0x13 | MOD2, Reg_8W, MAX},
- {
- "LCD4", LCD, 0x14, 0x14 | MOD2, Reg_8W, MAX},
- {
- "LCD5", LCD, 0x15, 0x15 | MOD2, Reg_8W, MAX},
- {
- "LCD6", LCD, 0x16, 0x16 | MOD2, Reg_8W, MAX},
- {
- "LCD7", LCD, 0x17, 0x17 | MOD2, Reg_8W, MAX},
- {
- "LCD8", LCD, 0x18, 0x18 | MOD2, Reg_8W, MAX},
- {
- "LCD9", LCD, 0x19, 0x19 | MOD2, Reg_8W, MAX},
- {
- "LCD10", LCD, 0x1a, 0x1a | MOD2, Reg_8W, MAX},
- {
- "LCD11", LCD, 0x1b, 0x1b | MOD2, Reg_8W, MAX},
- {
- "LCD12", LCD, 0x1c, 0x1c | MOD2, Reg_8W, MAX},
- {
- "LCD13", LCD, 0x1d, 0x1d | MOD2, Reg_8W, MAX},
- {
- "LCD14", LCD, 0x1e, 0x1e | MOD2, Reg_8W, MAX},
- {
- "LCD15", LCD, 0x1f, 0x1f | MOD2, Reg_8W, MAX},
- /* -------- SPI registers -------- */
- /* SPI data buffer Register : SER[7h] */
- {
- "SPIB", SPI, 0x5, 0x50 | MOD3, Reg_16W, MAX},
- /* SPI Control Register : SER[8h] Note : Bit 7 is a read only bit */
- {
- "SPICN", SPI, 0x15, 0x15 | MOD3, Reg_8W, MAX},
- /* SPI Configuration Register : SER[9h] Note : Bits 4,3 and 2 are read
- only. */
- {
- "SPICF", SPI, 0x16, 0x16 | MOD3, Reg_8W, MAX},
- /* SPI Clock Register : SER[Ah] */
- {
- "SPICK", SPI, 0x17, 0x17 | MOD3, Reg_8W, MAX},
- /* -------- One Wire Bus Master OWBM -------- */
- /* OWBM One Wire address Register register: [01h] */
- {
- "OWA", OWBM, 0x13, 0x13 | MOD3, Reg_8W, MAX},
- /* OWBM One Wire Data register: [02h] */
- {
- "OWD", OWBM, 0x14, 0x14 | MOD3, Reg_8W, MAX},
- /* -------- The Serial I/O module SER -------- */
- /* UART registers */
- /* Serial Port Control Register : SER[6h] */
- {
- "SCON1", SER1, 0x6, 0x60 | MOD3, Reg_8W, MAX},
- /* Serial Data Buffer Register : SER[7h] */
- {
- "SBUF1", SER1, 0x7, 0x70 | MOD3, Reg_8W, MAX},
- /* Serial Port Mode Register : SER[4h] */
- {
- "SMD1", SER1, 0x8, 0x80 | MOD3, Reg_8W, MAX},
- /* Serial Port Phase Register : SER[4h] */
- {
- "PR1", SER1, 0x9, 0x90 | MOD3, Reg_16W, MAX},
- /* -------- Timer/Counter 2 Module -------- */
- /* Timer 2 configuration Register : TC[3h] */
- {
- "T2CNA0", TIMER20, 0x0, 0x00 | MOD3, Reg_8W, MAX},
- {
- "T2H0", TIMER20, 0x1, 0x10 | MOD3, Reg_8W, MAX},
- {
- "T2RH0", TIMER20, 0x2, 0x20 | MOD3, Reg_8W, MAX},
- {
- "T2CH0", TIMER20, 0x3, 0x30 | MOD3, Reg_8W, MAX},
- {
- "T2CNB0", TIMER20, 0xc, 0xc0 | MOD3, Reg_8W, MAX},
- {
- "T2V0", TIMER20, 0xd, 0xd0 | MOD3, Reg_16W, MAX},
- {
- "T2R0", TIMER20, 0xe, 0xe0 | MOD3, Reg_16W, MAX},
- {
- "T2C0", TIMER20, 0xf, 0xf0 | MOD3, Reg_16W, MAX},
- {
- "T2CFG0", TIMER20, 0x10, 0x10 | MOD3, Reg_8W, MAX},
- /* Timer 2-1 configuration Register : TC[4h] */
-
- {
- "T2CNA1", TIMER21, 0x0, 0x00 | MOD4, Reg_8W, MAX},
- {
- "T2H1", TIMER21, 0x1, 0x10 | MOD4, Reg_8W, MAX},
- {
- "T2RH1", TIMER21, 0x2, 0x20 | MOD4, Reg_8W, MAX},
- {
- "T2CH1", TIMER21, 0x3, 0x30 | MOD4, Reg_8W, MAX},
- {
- "T2CNA2", TIMER21, 0x4, 0x40 | MOD4, Reg_8W, MAX},
- {
- "T2H2", TIMER21, 0x5, 0x50 | MOD4, Reg_8W, MAX},
- {
- "T2RH2", TIMER21, 0x6, 0x60 | MOD4, Reg_8W, MAX},
- {
- "T2CH2", TIMER21, 0x7, 0x70 | MOD4, Reg_8W, MAX},
- {
- "T2CNB1", TIMER21, 0x8, 0x80 | MOD4, Reg_8W, MAX},
- {
- "T2V1", TIMER21, 0x9, 0x90 | MOD4, Reg_16W, MAX},
- {
- "T2R1", TIMER21, 0xa, 0xa0 | MOD4, Reg_16W, MAX},
- {
- "T2C1", TIMER21, 0xb, 0xb0 | MOD4, Reg_16W, MAX},
- {
- "T2CNB2", TIMER21, 0xc, 0xc0 | MOD4, Reg_8W, MAX},
- {
- "T2V2", TIMER21, 0xd, 0xd0 | MOD4, Reg_16W, MAX},
- {
- "T2R2", TIMER21, 0xe, 0xe0 | MOD4, Reg_16W, MAX},
- {
- "T2C2", TIMER21, 0xf, 0xf0 | MOD4, Reg_16W, MAX},
- {
- "T2CFG1", TIMER21, 0x10, 0x10 | MOD4, Reg_8W, MAX},
- {
- "T2CFG2", TIMER21, 0x11, 0x11 | MOD4, Reg_8W, MAX},
- {
- NULL, 0, 0, 0, 0, 0}
-};
-
-/* Memory access argument. */
-struct mem_access
-{
- char *name; /* Name of the Memory access operand. */
- int opcode; /* Its corresponding opcode. */
-};
-typedef struct mem_access mem_access;
-
-/* The Memory table for accessing the data memory through particular registers. */
-struct mem_access mem_table[] =
-{
- /* The Pop Operation on the stack. */
- {"@SP--", 0x0d},
- /* Data Pointer 0 */
- {"@DP[0]", 0x0f},
- /* Data Ponter 1 */
- {"@DP[1]", 0x4f},
- /* Data Pointer 0 post increment */
- {"@DP[0]++", 0x1f},
- /* Data Pointer 1 post increment */
- {"@DP[1]++", 0x5f},
- /* Data Pointer 0 post decrement */
- {"@DP[0]--", 0x2f},
- /* Data Pointer 1 post decrement */
- {"@DP[1]--", 0x6f},
- /* ADDED According to New Specification. */
-
- {"@BP[OFFS]", 0x0E},
- {"@BP[OFFS++]", 0x1E},
- {"@BP[OFFS--]", 0x2E},
- {"NUL", 0x76},
- {"@++SP", 0x0D},
- {"@BP[++OFFS]", 0x1E},
- {"@BP[--OFFS]", 0x2E},
- {"@++DP[0]", 0x1F},
- {"@++DP[1]", 0x5F}, {"@--DP[0]", 0x2F}, {"@--DP[1]", 0x6F}
-};
-
-/* Register bit argument. */
-struct reg_bit
-{
- reg_entry *reg;
- int bit;
-};
-typedef struct reg_bit reg_bit;
-
-/* There are certain names given to particular bits of some registers.
- These will be taken care of here. */
-struct bit_name
-{
- char *name;
- char *reg_bit;
-};
-typedef struct bit_name bit_name;
-
-bit_name bit_table[] =
-{
- {
- "RI", "SCON.0"},
- /* FOr APC */
- {
- "MOD0", "APC.0"},
- {
- "MOD1", "APC.1"},
- {
- "MOD2", "APC.2"},
- {
- "IDS", "APC.6"},
- {
- "CLR", "APC.6"},
- /* For PSF */
- {
- "E", "PSF.0"},
- {
- "C", "PSF.1"},
- {
- "OV", "PSF.2"},
- {
- "S", "PSF.6"},
- {
- "Z", "PSF.7"},
- /* For IC */
-
- {
- "IGE", "IC.0"},
- {
- "INS", "IC.1"},
- {
- "CGDS", "IC.5"},
- /* For IMR */
-
- {
- "IM0", "IMR.0"},
- {
- "IM1", "IMR.1"},
- {
- "IM2", "IMR.2"},
- {
- "IM3", "IMR.3"},
- {
- "IM4", "IMR.4"},
- {
- "IM5", "IMR.5"},
- {
- "IMS", "IMR.7"},
- /* For SC */
- {
- "PWL", "SC.1"},
- {
- "ROD", "SC.2"},
- {
- "UPA", "SC.3"},
- {
- "CDA0", "SC.4"},
- {
- "CDA1", "SC.5"},
- /* For IIR */
-
- {
- "II0", "IIR.0"},
- {
- "II1", "IIR.1"},
- {
- "II2", "IIR.2"},
- {
- "II3", "IIR.3"},
- {
- "II4", "IIR.4"},
- {
- "II5", "IIR.5"},
- {
- "IIS", "IIR.7"},
- /* For CKCN */
-
- {
- "CD0", "CKCN.0"},
- {
- "CD1", "CKCN.1"},
- {
- "PMME", "CKCN.2"},
- {
- "SWB", "CKCN.3"},
- {
- "STOP", "CKCN.4"},
- {
- "RGMD", "CKCN.5"},
- {
- "RGSL", "CKCN.6"},
- /* For WDCN */
-
- {
- "RWT", "WDCN.0"},
- {
- "EWT", "WDCN.1"},
- {
- "WTRF", "WDCN.2"},
- {
- "WDIF", "WDCN.3"},
- {
- "WD0", "WDCN.4"},
- {
- "WD1", "WDCN.5"},
- {
- "EWDI", "WDCN.6"},
- {
- "POR", "WDCN.7"},
- /* For DPC */
-
- {
- "DPS0", "DPC.0"},
- {
- "DPS1", "DPC.1"},
- {
- "WBS0", "DPC.2"},
- {
- "WBS1", "DPC.3"},
- {
- "WBS2", "DPC.4"},
-
- /* For SCON */
- {
- "TI", "SCON.1"},
- {
- "RB8", "SCON.2"},
- {
- "TB8", "SCON.3"},
- {
- "REN", "SCON.4"},
- {
- "SM2", "SCON.5"},
- {
- "SM1", "SCON.6"},
- {
- "SM0", "SCON.7"},
- {
- "FE", "SCON.7"}
-};
-
-const char *LSInstr[] =
-{
- "LJUMP", "SJUMP", "LDJNZ", "SDJNZ", "LCALL", "SCALL", "JUMP",
- "DJNZ", "CALL", NULL
-};
-
-typedef enum
-{
- DST,
- SRC,
- BOTH,
-}
-type1;
-
-struct mem_access_syntax
-{
- char name[12]; /* Name of the Memory access operand. */
- type1 type;
- char *invalid_op[5];
-};
-typedef struct mem_access_syntax mem_access_syntax;
-
-/* The Memory Access table for accessing the data memory through particular
- registers. */
-const mem_access_syntax mem_access_syntax_table[] =
-{
- {
- "@SP--", SRC,
- {
- NULL, NULL, NULL, NULL, NULL}},
- /* Data Pointer 0 */
- {
- "@DP[0]", BOTH,
- {
- "@DP[0]--", "@DP[0]++", NULL, NULL, NULL}},
- /* Data Ponter 1 */
- {
- "@DP[1]", BOTH,
- {
- "@DP[1]--", "@DP[1]++", NULL, NULL, NULL}},
- /* Data Pointer 0 post increment */
- {
- "@DP[0]++", SRC,
- {
- NULL, NULL, NULL, NULL, NULL}},
- /* Data Pointer 1 post increment */
- {
- "@DP[1]++", SRC,
- {
- NULL, NULL, NULL, NULL, NULL}},
- /* Data Pointer 0 post decrement */
- {
- "@DP[0]--", SRC,
- {
- NULL, NULL, NULL, NULL, NULL}},
- /* Data Pointer 1 post decrement */
- {
- "@DP[1]--", SRC,
- {
- NULL, NULL, NULL, NULL, NULL}},
- /* ADDED According to New Specification */
-
- {
- "@BP[OFFS]", BOTH,
- {
- "@BP[OFFS++]", "@BP[OFFS--]", NULL, NULL, NULL}},
- {
- "@BP[OFFS++]", SRC,
- {
- NULL, NULL, NULL, NULL, NULL}},
- {
- "@BP[OFFS--]", SRC,
- {
- NULL, NULL, NULL, NULL, NULL}},
- {
- "NUL", DST,
- {
- NULL, NULL, NULL, NULL, NULL}},
- {
- "@++SP", DST,
- {
- NULL, NULL, NULL, NULL, NULL}},
- {
- "@BP[++OFFS]", DST,
- {
- "@BP[OFFS--]", "@BP[OFFS++]", NULL, NULL, NULL}},
- {
- "@BP[--OFFS]", DST,
- {
- "@BP[OFFS--]", "@BP[OFFS++]", NULL, NULL, NULL}},
- {
- "@++DP[0]", DST,
- {
- "@DP[0]--", "@DP[0]++", NULL, NULL, NULL}},
- {
- "@++DP[1]", DST,
- {
- "@DP[1]--", "@DP[1]++", NULL, NULL, NULL}},
- {
- "@--DP[0]", DST,
- {
- "@DP[0]++", "@DP[0]--", NULL, NULL, NULL}},
- {
- "@--DP[1]", DST,
- {
- "@DP[1]++", "@DP[1]--", NULL, NULL, NULL}}
-};
-
-#endif
+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * emulparams/maxqcoff.sh: Delete file.
+ * scripttempl/maxqcoff.sc: Delete file.
+ * Makefile.am: Remove references to maxq.
+ * configure.tgt: Likewise.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
2010-06-27 Alan Modra <amodra@gmail.com>
* pe-dll.c (fill_edata): Avoid set but unused warning.
em68knbsd.@OBJEXT@ \
em68kpsos.@OBJEXT@ \
em88kbcs.@OBJEXT@ \
- emaxqcoff.@OBJEXT@ \
emcorepe.@OBJEXT@ \
emipsbig.@OBJEXT@ \
emipsbsd.@OBJEXT@ \
em88kbcs.c: $(srcdir)/emulparams/m88kbcs.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/m88kbcs.sc ${GEN_DEPENDS}
${GENSCRIPTS} m88kbcs "$(tdir_m88kbcs)"
-emaxqcoff.c: $(srcdir)/emulparams/maxqcoff.sh \
- $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/maxqcoff.sc ${GEN_DEPENDS}
- ${GENSCRIPTS} maxqcoff "$(tdir_maxqcoff)"
emcorepe.c: $(srcdir)/emulparams/mcorepe.sh \
$(srcdir)/emultempl/pe.em $(srcdir)/scripttempl/pe.sc ${GEN_DEPENDS}
${GENSCRIPTS} mcorepe "$(tdir_mcorepe)"
em68knbsd.@OBJEXT@ \
em68kpsos.@OBJEXT@ \
em88kbcs.@OBJEXT@ \
- emaxqcoff.@OBJEXT@ \
emcorepe.@OBJEXT@ \
emipsbig.@OBJEXT@ \
emipsbsd.@OBJEXT@ \
em88kbcs.c: $(srcdir)/emulparams/m88kbcs.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/m88kbcs.sc ${GEN_DEPENDS}
${GENSCRIPTS} m88kbcs "$(tdir_m88kbcs)"
-emaxqcoff.c: $(srcdir)/emulparams/maxqcoff.sh \
- $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/maxqcoff.sc ${GEN_DEPENDS}
- ${GENSCRIPTS} maxqcoff "$(tdir_maxqcoff)"
emcorepe.c: $(srcdir)/emulparams/mcorepe.sh \
$(srcdir)/emultempl/pe.em $(srcdir)/scripttempl/pe.sc ${GEN_DEPENDS}
${GENSCRIPTS} mcorepe "$(tdir_mcorepe)"
ac_fn_c_check_decl ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $2 is declared" >&5
-$as_echo_n "checking whether $2 is declared... " >&6; }
+ as_decl_name=`echo $2|sed 's/ *(.*//'`
+ as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
+$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
$as_echo_n "(cached) " >&6
else
int
main ()
{
-#ifndef $2
- (void) $2;
+#ifndef $as_decl_name
+#ifdef __cplusplus
+ (void) $as_decl_use;
+#else
+ (void) $as_decl_name;
+#endif
#endif
;
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 11617 "configure"
+#line 11623 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 11723 "configure"
+#line 11729 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
;;
m8*-*-*) targ_emul=m88kbcs
;;
-maxq-*-coff) targ_emul=maxqcoff
- ;;
mcore-*-pe) targ_emul=mcorepe ;
targ_extra_ofiles="deffilep.o pe-dll.o" ;;
mcore-*-elf) targ_emul=elf32mcore
+++ /dev/null
-OUTPUT_FORMAT="coff-maxq"
-
-SCRIPT_NAME=maxqcoff
-
-ARCH=MAXQ
-
-TEXT_START_ADDR=0x8000
ldfile.h
ldlang.c
ldlang.h
+ldlex-wrapper.c
ldlex.h
ldmain.c
ldmain.h
+++ /dev/null
-test -z "$ENTRY" && ENTRY=_main
-cat <<EOF
-OUTPUT_FORMAT("${OUTPUT_FORMAT}")
-${LIB_SEARCH_DIRS}
-${RELOCATING+ENTRY (${ENTRY})}
-MEMORY
- {
- rom (rx) : ORIGIN = 0, LENGTH = 0x7FFE
- ram (!rx) : org = 0x0A000, l = 0x5FFF
- }
-
-SECTIONS
-{
- .text ${RELOCATING+ 0x0000}:
- {
- *(.text)
- } >rom
-
- .data ${RELOCATING}:
- {
- *(.data)
- *(.rodata)
- *(.bss)
- *(COMMON)
- ${RELOCATING+ edata = .};
- }>ram
-
-/* .bss ${RELOCATING+ SIZEOF(.data) + 0x0000} :
- {
- *(.bss)
- *(COMMON)
- }
-*/
- .stab 0 ${RELOCATING+(NOLOAD)} :
- {
- [ .stab ]
- }
- .stabstr 0 ${RELOCATING+(NOLOAD)} :
- {
- [ .stabstr ]
- }
-}
-EOF
+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * ld-maxq/maxq.exp: Delete file.
+ * ld-maxq/addend.dd, * ld-maxq/addend.s, * ld-maxq/paddr.dd,
+ * ld-maxq/paddr.s, * ld-maxq/paddr1.dd, * ld-maxq/paddr1.s,
+ * ld-maxq/r32-1.s, * ld-maxq/r32-2.s, * ld-maxq/r32.dd: Likewise.
+
2010-06-15 Joseph Myers <joseph@codesourcery.com>
* ld-elf/orphan3.d: Allow section names starting '_'.
+++ /dev/null
-# Expect script for ld-maxq tests
-# Copyright (C) 2004, 2005, 2007 Free Software Foundation
-#
-# This file is part of the GNU Binutils.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
-# MA 02110-1301, USA.
-#
-# Written by inderpreetb@noida.hcltech.com
-
-# Test maxq linking; all types of relocs. This tests the assembler and
-# tools like objdump as well as the linker.
-
-if { !([istarget "maxq*-*-*"] ) } {
- return
-}
-
-# List contains test-items with 3 items followed by 2 lists:
-# 0:name 1:ld options 2:assembler options
-# 3:filenames of assembler files 4: action and options. 5: name of output file
-
-# Actions:
-# objdump: Apply objdump options on result. Compare with regex (last arg).
-# nm: Apply nm options on result. Compare with regex (last arg).
-# readelf: Apply readelf options on result. Compare with regex (last arg).
-
-set maxqtests {
-{"32-bit Relocation check" "" ""
-{r32-1.s r32-2.s} {{objdump -drw r32.dd}}
-"r32.o" }
-{"maxq addend check" "" ""
-{addend.s} {{objdump -dw addend.dd}}
-"addendo.o" }
-{"16bit relocation test" "" ""
-{paddr.s} {{objdump -Dw paddr.dd}}
-"paddro.o" }
-{"16bit relocation test-1" "" ""
-{paddr1.s} {{objdump -Dw paddr1.dd}}
-"paddro1.o" }
-
-}
-
-run_ld_link_tests $maxqtests
+2010-06-29 Alan Modra <amodra@gmail.com>
+
+ * maxq-dis.c: Delete file.
+ * Makefile.am: Remove references to maxq.
+ * configure.in: Likewise.
+ * disassemble.c: Likewise.
+ * Makefile.in: Regenerate.
+ * configure: Regenerate.
+ * po/POTFILES.in: Regenerate.
+
2010-06-29 Alan Modra <amodra@gmail.com>
* mep-dis.c: Regenerate.
m68k-dis.c \
m68k-opc.c \
m88k-dis.c \
- maxq-dis.c \
mcore-dis.c \
mep-asm.c \
mep-desc.c \
m68k-dis.c \
m68k-opc.c \
m88k-dis.c \
- maxq-dis.c \
mcore-dis.c \
mep-asm.c \
mep-desc.c \
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m68k-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m68k-opc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/m88k-dis.Plo@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/maxq-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mcore-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-asm.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-desc.Plo@am__quote@
ac_fn_c_check_decl ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $2 is declared" >&5
-$as_echo_n "checking whether $2 is declared... " >&6; }
+ as_decl_name=`echo $2|sed 's/ *(.*//'`
+ as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
+$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
$as_echo_n "(cached) " >&6
else
int
main ()
{
-#ifndef $2
- (void) $2;
+#ifndef $as_decl_name
+#ifdef __cplusplus
+ (void) $as_decl_use;
+#else
+ (void) $as_decl_name;
+#endif
#endif
;
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 11139 "configure"
+#line 11145 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 11245 "configure"
+#line 11251 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
bfd_m68hc12_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
bfd_m68k_arch) ta="$ta m68k-dis.lo m68k-opc.lo" ;;
bfd_m88k_arch) ta="$ta m88k-dis.lo" ;;
- bfd_maxq_arch) ta="$ta maxq-dis.lo" ;;
bfd_mcore_arch) ta="$ta mcore-dis.lo" ;;
bfd_mep_arch) ta="$ta mep-asm.lo mep-desc.lo mep-dis.lo mep-ibld.lo mep-opc.lo" using_cgen=yes ;;
bfd_microblaze_arch) ta="$ta microblaze-dis.lo" ;;
bfd_m68hc12_arch) ta="$ta m68hc11-dis.lo m68hc11-opc.lo" ;;
bfd_m68k_arch) ta="$ta m68k-dis.lo m68k-opc.lo" ;;
bfd_m88k_arch) ta="$ta m88k-dis.lo" ;;
- bfd_maxq_arch) ta="$ta maxq-dis.lo" ;;
bfd_mcore_arch) ta="$ta mcore-dis.lo" ;;
bfd_mep_arch) ta="$ta mep-asm.lo mep-desc.lo mep-dis.lo mep-ibld.lo mep-opc.lo" using_cgen=yes ;;
bfd_microblaze_arch) ta="$ta microblaze-dis.lo" ;;
#define ARCH_m68hc12
#define ARCH_m68k
#define ARCH_m88k
-#define ARCH_maxq
#define ARCH_mcore
#define ARCH_mep
#define ARCH_microblaze
disassemble = print_insn_m88k;
break;
#endif
-#ifdef ARCH_maxq
- case bfd_arch_maxq:
- disassemble = print_insn_maxq_little;
- break;
-#endif
#ifdef ARCH_mt
case bfd_arch_mt:
disassemble = print_insn_mt;
+++ /dev/null
-/* Instruction printing code for the MAXQ
-
- Copyright 2004, 2005, 2007, 2009, 2010 Free Software Foundation, Inc.
-
- Written by Vineet Sharma(vineets@noida.hcltech.com) Inderpreet
- S.(inderpreetb@noida.hcltech.com)
-
- This file is part of the GNU opcodes library.
-
- This library is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3, or (at your option)
- any later version.
-
- It is distributed in the hope that it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
- License for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-
-#include "sysdep.h"
-#include "dis-asm.h"
-#include "opcode/maxq.h"
-
-struct _group_info
-{
- unsigned char group_no;
- unsigned char sub_opcode;
- unsigned char src;
- unsigned char dst;
- unsigned char fbit;
- unsigned char bit_no;
- unsigned char flag;
-
-};
-
-typedef struct _group_info group_info;
-
-#define SRC 0x01
-#define DST 0x02
-#define FORMAT 0x04
-#define BIT_NO 0x08
-#define SUB_OP 0x10
-
-#define MASK_LOW_BYTE 0x0f
-#define MASK_HIGH_BYTE 0xf0
-
-/* Flags for retrieving the bits from the op-code. */
-#define _DECODE_LOWNIB_LOWBYTE 0x000f
-#define _DECODE_HIGHNIB_LOWBYTE 0x00f0
-#define _DECODE_LOWNIB_HIGHBYTE 0x0f00
-#define _DECODE_HIGHNIB_HIGHBYTE 0xf000
-#define _DECODE_HIGHBYTE 0xff00
-#define _DECODE_LOWBYTE 0x00ff
-#define _DECODE_4TO6_HIGHBYTE 0x7000
-#define _DECODE_4TO6_LOWBYTE 0x0070
-#define _DECODE_0TO6_HIGHBYTE 0x7f00
-#define _DECODE_0TO2_HIGHBYTE 0x0700
-#define _DECODE_GET_F_HIGHBYTE 0x8000
-#define _DECODE_BIT7_HIGHBYTE 0x8000
-#define _DECODE_BIT7_LOWBYTE 0x0080
-#define _DECODE_GET_CARRY 0x10000
-#define _DECODE_BIT0_LOWBYTE 0x1
-#define _DECODE_BIT6AND7_HIGHBYTE 0xc000
-
-/* Module and Register Indexed of System Registers. */
-#define _CURR_ACC_MODINDEX 0xa
-#define _CURR_ACC_REGINDEX 0x0
-#define _PSF_REG_MODINDEX 0x8
-#define _PSF_REG_REGINDEX 0x4
-#define _PFX_REG_MODINDEX 0xb
-#define _PFX0_REG_REGINDEX 0x0
-#define _PFX2_REG_REGINDEX 0x2
-#define _DP_REG_MODINDEX 0xf
-#define _DP0_REG_REGINDEX 0x3
-#define _DP1_REG_REGINDEX 0x7
-#define _IP_REG_MODINDEX 0xc
-#define _IP_REG_REGINDEX 0x0
-#define _IIR_REG_MODINDEX 0x8
-#define _IIR_REG_REGINDEX 0xb
-#define _SP_REG_MODINDEX 0xd
-#define _SP_REG_REGINDEX 0x1
-#define _IC_REG_MODINDEX 0x8
-#define _IC_REG_REGINDEX 0x5
-#define _LC_REG_MODINDEX 0xe
-#define _LC0_REG_REGINDEX 0x0
-#define _LC1_REG_REGINDEX 0x1
-#define _LC2_REG_REGINDEX 0x2
-#define _LC3_REG_REGINDEX 0x3
-
-/* Flags for finding the bits in PSF Register. */
-#define SIM_ALU_DECODE_CARRY_BIT_POS 0x2
-#define SIM_ALU_DECODE_SIGN_BIT_POS 0x40
-#define SIM_ALU_DECODE_ZERO_BIT_POS 0x80
-#define SIM_ALU_DECODE_EQUAL_BIT_POS 0x1
-#define SIM_ALU_DECODE_IGE_BIT_POS 0x1
-
-/* Number Of Op-code Groups. */
-unsigned char const SIM_ALU_DECODE_OPCODE_GROUPS = 11;
-
-/* Op-code Groups. */
-unsigned char const SIM_ALU_DECODE_LOGICAL_XCHG_OP_GROUP = 1;
-
-/* Group1: AND/OR/XOR/ADD/SUB Operations: fxxx 1010 ssss ssss. */
-unsigned char const SIM_ALU_DECODE_AND_OR_ADD_SUB_OP_GROUP = 2;
-
-/* Group2: Logical Operations: 1000 1010 xxxx 1010. */
-unsigned char const SIM_ALU_DECODE_BIT_OP_GROUP = 3;
-
-/* XCHG/Bit Operations: 1xxx 1010 xxxx 1010. */
-unsigned char const SIM_ALU_DECODE_SET_DEST_BIT_GROUP = 4;
-
-/* Move value in bit of destination register: 1ddd dddd xbbb 0111. */
-unsigned char const SIM_ALU_DECODE_JUMP_OP_GROUP = 5;
-
-#define JUMP_CHECK(insn) \
- ( ((insn & _DECODE_4TO6_HIGHBYTE) == 0x0000) \
- || ((insn & _DECODE_4TO6_HIGHBYTE) == 0x2000) \
- || ((insn & _DECODE_4TO6_HIGHBYTE) == 0x6000) \
- || ((insn & _DECODE_4TO6_HIGHBYTE) == 0x1000) \
- || ((insn & _DECODE_4TO6_HIGHBYTE) == 0x5000) \
- || ((insn & _DECODE_4TO6_HIGHBYTE) == 0x3000) \
- || ((insn & _DECODE_4TO6_HIGHBYTE) == 0x7000) \
- || ((insn & _DECODE_4TO6_HIGHBYTE) == 0x4000) )
-
-/* JUMP operations: fxxx 1100 ssss ssss */
-unsigned char const SIM_ALU_DECODE_RET_OP_GROUP = 6;
-
-/* RET Operations: 1xxx 1100 0000 1101 */
-unsigned char const SIM_ALU_DECODE_MOVE_SRC_DST_GROUP = 7;
-
-/* Move src into dest register: fddd dddd ssss ssss */
-unsigned char const SIM_ALU_DECODE_SET_SRC_BIT_GROUP = 8;
-
-/* Move value in bit of source register: fbbb 0111 ssss ssss */
-unsigned char const SIM_ALU_DECODE_DJNZ_CALL_PUSH_OP_GROUP = 9;
-
-/* PUSH, DJNZ and CALL operations: fxxx 1101 ssss ssss */
-unsigned char const SIM_ALU_DECODE_POP_OP_GROUP = 10;
-
-/* POP operation: 1ddd dddd 0000 1101 */
-unsigned char const SIM_ALU_DECODE_CMP_SRC_OP_GROUP = 11;
-
-/* GLOBAL */
-char unres_reg_name[20];
-
-static char *
-get_reg_name (unsigned char reg_code, type1 arg_pos)
-{
- unsigned char module;
- unsigned char r_index;
- int ix = 0;
- reg_entry const *reg_x;
- mem_access_syntax const *syntax;
- mem_access *mem_acc;
-
- module = 0;
- r_index = 0;
- module = (reg_code & MASK_LOW_BYTE);
- r_index = (reg_code & MASK_HIGH_BYTE);
- r_index = r_index >> 4;
-
- /* Search the system register table. */
- for (reg_x = &system_reg_table[0]; reg_x->reg_name != NULL; ++reg_x)
- if ((reg_x->Mod_name == module) && (reg_x->Mod_index == r_index))
- return reg_x->reg_name;
-
- /* Serch pheripheral table. */
- for (ix = 0; ix < num_of_reg; ix++)
- {
- reg_x = &new_reg_table[ix];
-
- if ((reg_x->Mod_name == module) && (reg_x->Mod_index == r_index))
- return reg_x->reg_name;
- }
-
- for (mem_acc = &mem_table[0]; mem_acc->name != NULL || !mem_acc; ++mem_acc)
- {
- if (reg_code == mem_acc->opcode)
- {
- for (syntax = mem_access_syntax_table;
- syntax != NULL && syntax->name;
- ++syntax)
- if (!strcmp (mem_acc->name, syntax->name))
- {
- if ((arg_pos == syntax->type) || (syntax->type == BOTH))
- return mem_acc->name;
-
- break;
- }
- }
- }
-
- memset (unres_reg_name, 0, 20);
- sprintf (unres_reg_name, "%01x%01xh", r_index, module);
-
- return unres_reg_name;
-}
-
-static bfd_boolean
-check_move (unsigned char insn0, unsigned char insn8)
-{
- bfd_boolean first = FALSE;
- bfd_boolean second = FALSE;
- reg_entry const *reg_x;
- const unsigned char module1 = insn0 & MASK_LOW_BYTE;
- const unsigned char index1 = ((insn0 & 0x70) >> 4);
- const unsigned char module2 = insn8 & MASK_LOW_BYTE;
- const unsigned char index2 = ((insn8 & MASK_HIGH_BYTE) >> 4);
-
- /* DST */
- if (((insn0 & MASK_LOW_BYTE) == MASK_LOW_BYTE)
- && ((index1 == 0) || (index1 == 1) || (index1 == 2) || (index1 == 5)
- || (index1 == 4) || (index1 == 6)))
- first = TRUE;
-
- else if (((insn0 & MASK_LOW_BYTE) == 0x0D) && (index1 == 0))
- first = TRUE;
-
- else if ((module1 == 0x0E)
- && ((index1 == 0) || (index1 == 1) || (index1 == 2)))
- first = TRUE;
-
- else
- {
- for (reg_x = &system_reg_table[0]; reg_x->reg_name != NULL && reg_x;
- ++reg_x)
- {
- if ((reg_x->Mod_name == module1) && (reg_x->Mod_index == index1)
- && ((reg_x->rtype == Reg_16W) || (reg_x->rtype == Reg_8W)))
- {
- /* IP not allowed. */
- if ((reg_x->Mod_name == 0x0C) && (reg_x->Mod_index == 0x00))
- continue;
-
- /* A[AP] not allowed. */
- if ((reg_x->Mod_name == 0x0A) && (reg_x->Mod_index == 0x01))
- continue;
- first = TRUE;
- break;
- }
- }
- }
-
- if (!first)
- /* No need to check further. */
- return FALSE;
-
- if (insn0 & 0x80)
- {
- /* SRC */
- if (((insn8 & MASK_LOW_BYTE) == MASK_LOW_BYTE)
- && ((index2 == 0) || (index2 == 1) || (index2 == 2) || (index2 == 4)
- || (index2 == 5) || (index2 == 6)))
- second = TRUE;
-
- else if (((insn8 & MASK_LOW_BYTE) == 0x0D) && (index2 == 0))
- second = TRUE;
-
- else if ((module2 == 0x0E)
- && ((index2 == 0) || (index2 == 1) || (index2 == 2)))
- second = TRUE;
-
- else
- {
- for (reg_x = &system_reg_table[0];
- reg_x->reg_name != NULL && reg_x;
- ++reg_x)
- {
- if ((reg_x->Mod_name == (insn8 & MASK_LOW_BYTE))
- && (reg_x->Mod_index == (((insn8 & 0xf0) >> 4))))
- {
- second = TRUE;
- break;
- }
- }
- }
-
- if (second)
- {
- if ((module1 == 0x0A && index1 == 0x0)
- && (module2 == 0x0A && index2 == 0x01))
- return FALSE;
-
- return TRUE;
- }
-
- return FALSE;
- }
-
- return first;
-}
-
-static void
-maxq_print_arg (MAX_ARG_TYPE arg,
- struct disassemble_info * info,
- group_info grp)
-{
- switch (arg)
- {
- case FLAG_C:
- info->fprintf_func (info->stream, "C");
- break;
- case FLAG_NC:
- info->fprintf_func (info->stream, "NC");
- break;
-
- case FLAG_Z:
- info->fprintf_func (info->stream, "Z");
- break;
-
- case FLAG_NZ:
- info->fprintf_func (info->stream, "NZ");
- break;
-
- case FLAG_S:
- info->fprintf_func (info->stream, "S");
- break;
-
- case FLAG_E:
- info->fprintf_func (info->stream, "E");
- break;
-
- case FLAG_NE:
- info->fprintf_func (info->stream, "NE");
- break;
-
- case ACC_BIT:
- info->fprintf_func (info->stream, "Acc");
- if ((grp.flag & BIT_NO) == BIT_NO)
- info->fprintf_func (info->stream, ".%d", grp.bit_no);
- break;
-
- case A_BIT_0:
- info->fprintf_func (info->stream, "#0");
- break;
- case A_BIT_1:
- info->fprintf_func (info->stream, "#1");
- break;
-
- default:
- break;
- }
-}
-
-static unsigned char
-get_group (const unsigned int insn)
-{
- if (check_move ((insn >> 8), (insn & _DECODE_LOWBYTE)))
- return 8;
-
- if ((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0A00)
- {
- /* && condition with sec part added on 26 May for resolving 2 & 3 grp
- conflict. */
- if (((insn & _DECODE_LOWNIB_LOWBYTE) == 0x000A)
- && ((insn & _DECODE_GET_F_HIGHBYTE) == 0x8000))
- {
- if ((insn & _DECODE_HIGHNIB_HIGHBYTE) == 0x8000)
- return 2;
- else
- return 3;
- }
-
- return 1;
- }
- else if ((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0C00)
- {
- if (((insn & _DECODE_LOWBYTE) == 0x000D) && JUMP_CHECK (insn)
- && ((insn & _DECODE_GET_F_HIGHBYTE) == 0x8000))
- return 6;
- else if ((insn & _DECODE_LOWBYTE) == 0x008D)
- return 7;
-
- return 5;
- }
- else if (((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0D00)
- && (((insn & _DECODE_4TO6_HIGHBYTE) == 0x3000)
- || ((insn & _DECODE_4TO6_HIGHBYTE) == 0x4000)
- || ((insn & _DECODE_4TO6_HIGHBYTE) == 0x5000)
- || ((insn & _DECODE_4TO6_HIGHBYTE) == 0x0000)))
- return 10;
-
- else if ((insn & _DECODE_LOWBYTE) == 0x000D)
- return 11;
-
- else if ((insn & _DECODE_LOWBYTE) == 0x008D)
- return 12;
-
- else if ((insn & _DECODE_0TO6_HIGHBYTE) == 0x7800)
- return 13;
-
- else if ((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0700)
- return 9;
-
- else if (((insn & _DECODE_LOWNIB_LOWBYTE) == 0x0007)
- && ((insn & _DECODE_GET_F_HIGHBYTE) == 0x8000))
- return 4;
-
- return 8;
-}
-
-static void
-get_insn_opcode (const unsigned int insn, group_info *i)
-{
- static unsigned char pfx_flag = 0;
- static unsigned char count_for_pfx = 0;
-
- i->flag ^= i->flag;
- i->bit_no ^= i->bit_no;
- i->dst ^= i->dst;
- i->fbit ^= i->fbit;
- i->group_no ^= i->group_no;
- i->src ^= i->src;
- i->sub_opcode ^= i->sub_opcode;
-
- if (count_for_pfx > 0)
- count_for_pfx++;
-
- if (((insn >> 8) == 0x0b) || ((insn >> 8) == 0x2b))
- {
- pfx_flag = 1;
- count_for_pfx = 1;
- }
-
- i->group_no = get_group (insn);
-
- if (pfx_flag && (i->group_no == 0x0D) && (count_for_pfx == 2)
- && ((insn & _DECODE_0TO6_HIGHBYTE) == 0x7800))
- {
- i->group_no = 0x08;
- count_for_pfx = 0;
- pfx_flag ^= pfx_flag;
- }
-
- switch (i->group_no)
- {
- case 1:
- i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
- i->flag |= SUB_OP;
- i->src = ((insn & _DECODE_LOWBYTE));
- i->flag |= SRC;
- i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
- i->flag |= FORMAT;
- break;
-
- case 2:
- i->sub_opcode = ((insn & _DECODE_HIGHNIB_LOWBYTE) >> 4);
- i->flag |= SUB_OP;
- break;
-
- case 3:
- i->sub_opcode = ((insn & _DECODE_HIGHNIB_HIGHBYTE) >> 12);
- i->flag |= SUB_OP;
- i->bit_no = ((insn & _DECODE_HIGHNIB_LOWBYTE) >> 4);
- i->flag |= BIT_NO;
- break;
-
- case 4:
- i->sub_opcode = ((insn & _DECODE_BIT7_LOWBYTE) >> 7);
- i->flag |= SUB_OP;
- i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
- i->flag |= DST;
- i->bit_no = ((insn & _DECODE_4TO6_LOWBYTE) >> 4);
- i->flag |= BIT_NO;
- break;
-
- case 5:
- i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
- i->flag |= SUB_OP;
- i->src = ((insn & _DECODE_LOWBYTE));
- i->flag |= SRC;
- i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
- i->flag |= FORMAT;
- break;
-
- case 6:
- i->sub_opcode = ((insn & _DECODE_HIGHNIB_HIGHBYTE) >> 12);
- i->flag |= SUB_OP;
- break;
-
- case 7:
- i->sub_opcode = ((insn & _DECODE_HIGHNIB_HIGHBYTE) >> 12);
- i->flag |= SUB_OP;
- break;
-
- case 8:
- i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
- i->flag |= DST;
- i->src = ((insn & _DECODE_LOWBYTE));
- i->flag |= SRC;
- i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
- i->flag |= FORMAT;
- break;
-
- case 9:
- i->sub_opcode = ((insn & _DECODE_0TO2_HIGHBYTE) >> 8);
- i->flag |= SUB_OP;
- i->bit_no = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
- i->flag |= BIT_NO;
- i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
- i->flag |= FORMAT;
- i->src = ((insn & _DECODE_LOWBYTE));
- i->flag |= SRC;
- break;
-
- case 10:
- i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
- i->flag |= SUB_OP;
- i->src = ((insn & _DECODE_LOWBYTE));
- i->flag |= SRC;
- i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
- i->flag |= FORMAT;
- break;
-
- case 11:
- i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
- i->flag |= DST;
- break;
-
- case 12:
- i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
- i->flag |= DST;
- break;
-
- case 13:
- i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
- i->flag |= SUB_OP;
- i->src = ((insn & _DECODE_LOWBYTE));
- i->flag |= SRC;
- i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
- i->flag |= FORMAT;
- break;
-
- }
- return;
-}
-
-
-/* Print one instruction from MEMADDR on INFO->STREAM. Return the size of the
- instruction (always 2 on MAXQ20). */
-
-static int
-print_insn (bfd_vma memaddr, struct disassemble_info *info,
- enum bfd_endian endianess)
-{
- /* The raw instruction. */
- unsigned char insn[2], derived_code;
- unsigned int format;
- unsigned int actual_operands;
- unsigned int i;
- /* The group_info collected/decoded. */
- group_info grp;
- MAXQ20_OPCODE_INFO const *opcode;
- int status;
-
- format = 0;
-
- status = info->read_memory_func (memaddr, (bfd_byte *) & insn[0], 2, info);
-
- if (status != 0)
- {
- info->memory_error_func (status, memaddr, info);
- return -1;
- }
-
- /* FIXME: Endianness always little. */
- if (endianess == BFD_ENDIAN_BIG)
- get_insn_opcode (((insn[0] << 8) | (insn[1])), &grp);
- else
- get_insn_opcode (((insn[1] << 8) | (insn[0])), &grp);
-
- derived_code = ((grp.group_no << 4) | grp.sub_opcode);
-
- if (insn[0] == 0 && insn[1] == 0)
- {
- info->fprintf_func (info->stream, "00 00");
- return 2;
- }
-
- /* The opcode is always in insn[0]. */
- for (opcode = &op_table[0]; opcode->name != NULL; ++opcode)
- {
- if (opcode->instr_id == derived_code)
- {
- if (opcode->instr_id == 0x3D)
- {
- if ((grp.bit_no == 0) && (opcode->arg[1] != A_BIT_0))
- continue;
- if ((grp.bit_no == 1) && (opcode->arg[1] != A_BIT_1))
- continue;
- if ((grp.bit_no == 3) && (opcode->arg[0] != 0))
- continue;
- }
-
- info->fprintf_func (info->stream, "%s ", opcode->name);
-
- actual_operands = 0;
-
- if ((grp.flag & SRC) == SRC)
- actual_operands++;
-
- if ((grp.flag & DST) == DST)
- actual_operands++;
-
- /* If Implict FLAG in the Instruction. */
- if ((opcode->op_number > actual_operands)
- && !((grp.flag & SRC) == SRC) && !((grp.flag & DST) == DST))
- {
- for (i = 0; i < opcode->op_number; i++)
- {
- if (i == 1 && (opcode->arg[1] != NO_ARG))
- info->fprintf_func (info->stream, ",");
- maxq_print_arg (opcode->arg[i], info, grp);
- }
- }
-
- /* DST is ABSENT in the grp. */
- if ((opcode->op_number > actual_operands)
- && ((grp.flag & SRC) == SRC))
- {
- maxq_print_arg (opcode->arg[0], info, grp);
- info->fprintf_func (info->stream, " ");
-
- if (opcode->instr_id == 0xA4)
- info->fprintf_func (info->stream, "LC[0]");
-
- if (opcode->instr_id == 0xA5)
- info->fprintf_func (info->stream, "LC[1]");
-
- if ((grp.flag & SRC) == SRC)
- info->fprintf_func (info->stream, ",");
- }
-
- if ((grp.flag & DST) == DST)
- {
- if ((grp.flag & BIT_NO) == BIT_NO)
- {
- info->fprintf_func (info->stream, " %s.%d",
- get_reg_name (grp.dst,
- (type1) 0 /*DST*/),
- grp.bit_no);
- }
- else
- info->fprintf_func (info->stream, " %s",
- get_reg_name (grp.dst, (type1) 0));
- }
-
- /* SRC is ABSENT in the grp. */
- if ((opcode->op_number > actual_operands)
- && ((grp.flag & DST) == DST))
- {
- info->fprintf_func (info->stream, ",");
- maxq_print_arg (opcode->arg[1], info, grp);
- info->fprintf_func (info->stream, " ");
- }
-
- if ((grp.flag & SRC) == SRC)
- {
- if ((grp.flag & DST) == DST)
- info->fprintf_func (info->stream, ",");
-
- if ((grp.flag & BIT_NO) == BIT_NO)
- {
- format = opcode->format;
-
- if ((grp.flag & FORMAT) == FORMAT)
- format = grp.fbit;
- if (format == 1)
- info->fprintf_func (info->stream, " %s.%d",
- get_reg_name (grp.src,
- (type1) 1 /*SRC*/),
- grp.bit_no);
- if (format == 0)
- info->fprintf_func (info->stream, " #%02xh.%d",
- grp.src, grp.bit_no);
- }
- else
- {
- format = opcode->format;
-
- if ((grp.flag & FORMAT) == FORMAT)
- format = grp.fbit;
- if (format == 1)
- info->fprintf_func (info->stream, " %s",
- get_reg_name (grp.src,
- (type1) 1 /*SRC*/));
- if (format == 0)
- info->fprintf_func (info->stream, " #%02xh",
- (grp.src));
- }
- }
-
- return 2;
- }
- }
-
- info->fprintf_func (info->stream, "Unable to Decode : %02x %02x",
- insn[0], insn[1]);
- return 2;
-}
-
-int
-print_insn_maxq_little (bfd_vma memaddr, struct disassemble_info *info)
-{
- return print_insn (memaddr, info, BFD_ENDIAN_LITTLE);
-}
cgen-bitset.c
cgen-dis.c
cgen-opc.c
-cgen-ops.h
-cgen-types.h
cr16-dis.c
cr16-opc.c
cris-dis.c
m68k-dis.c
m68k-opc.c
m88k-dis.c
-maxq-dis.c
mcore-dis.c
mcore-opc.h
mep-asm.c
pj-opc.c
ppc-dis.c
ppc-opc.c
+rx-decode.c
+rx-dis.c
s390-dis.c
s390-mkopc.c
s390-opc.c
tic4x-dis.c
tic54x-dis.c
tic54x-opc.c
+tic6x-dis.c
tic80-dis.c
tic80-opc.c
v850-dis.c
projects / binutils-gdb.git / commitdiff