Updated andrey (my) tasks and IRC name
authorAndrey Miroshnikov <andrey@technepisteme.xyz>
Tue, 7 Dec 2021 22:34:49 +0000 (22:34 +0000)
committerAndrey Miroshnikov <andrey@technepisteme.xyz>
Tue, 7 Dec 2021 22:34:49 +0000 (22:34 +0000)
about_us.mdwn
andreym.mdwn

index fbd1d24bd7168d6fce9f86b88205501fbf00d37a..3c8345dffa2d203b4ecfd4488332900c276c4e89 100644 (file)
@@ -215,6 +215,7 @@ Alain's website: <http://phcomp.co.uk>
 * Experience: FPGA/ASIC system validation, instrument automation using VISA, PCB design (KiCAD, Altium)
 * Other interests: Lingua Latina, Philosophy, History
 * Availability: Full-time
+* IRC: octavius
 
 ## [[Manikandan Nagarajan|Manik]]
 
index fe0d418b612e2ee3f764398fd273f1f5f21709d9..ce685450668cc07a35492c39b0a06cf8b0860d81 100644 (file)
@@ -4,7 +4,13 @@
 
 
 ## Currently working on
-* Learning the project repo structure, looking at tutorials.
+* Learning the project repo structure, learning from existing code.
+* <https://bugs.libre-soc.org/show_bug.cgi?id=739> Creating NGI router pinout based on requirements and chip constraints.
+  - (Pinout) - NGI POINTER Gigabit Router Pinout Considerations
+* <https://bugs.libre-soc.org/show_bug.cgi?id=50> Working on pinmux with Luke
+  - nmigen pinmux
+
+## On hold
 * Looking at Wishbone B4 and AXI specifications for streaming extension.
 * <https://bugs.libre-soc.org/show_bug.cgi?id=244> Wishbone B4 Streaming Specification enhancement