$(shell pkg-config libdrm --atleast-version=2.3.1 \
&& echo "-DDRM_VBLANK_FLIP=DRM_VBLANK_FLIP")
+DRI_LIB_DEPS += -ldrm_intel
+
include ../Makefile.template
intel_decode.o: ../intel/intel_decode.c
#include "mtypes.h"
#include "enums.h"
#include "texformat.h"
-#include "dri_bufmgr.h"
#include "intel_mipmap_tree.h"
#include "intel_tex.h"
#include "mtypes.h"
#include "enums.h"
#include "texformat.h"
-#include "dri_bufmgr.h"
#include "intel_mipmap_tree.h"
#include "intel_tex.h"
DRIVER_DEFINES = -I../intel -I../intel/server
+DRI_LIB_DEPS += -ldrm_intel
+
include ../Makefile.template
symlinks:
NULL, NULL);
/* Emit CC viewport relocation */
- intel_bo_emit_reloc(bo,
- I915_GEM_DOMAIN_INSTRUCTION,
- 0,
- 0,
- offsetof(struct brw_cc_unit_state, cc4),
- brw->cc.vp_bo);
+ dri_bo_emit_reloc(bo,
+ I915_GEM_DOMAIN_INSTRUCTION,
+ 0,
+ 0,
+ offsetof(struct brw_cc_unit_state, cc4),
+ brw->cc.vp_bo);
return bo;
}
/* Emit clip program relocation */
assert(brw->clip.prog_bo);
- intel_bo_emit_reloc(bo,
- I915_GEM_DOMAIN_INSTRUCTION,
- 0,
- clip.thread0.grf_reg_count << 1,
- offsetof(struct brw_clip_unit_state, thread0),
- brw->clip.prog_bo);
+ dri_bo_emit_reloc(bo,
+ I915_GEM_DOMAIN_INSTRUCTION,
+ 0,
+ clip.thread0.grf_reg_count << 1,
+ offsetof(struct brw_clip_unit_state, thread0),
+ brw->clip.prog_bo);
return bo;
}
#include "mtypes.h" /* for GLcontext... */
#include "vbo/vbo.h"
-#include "dri_bufmgr.h"
struct brw_context;
if (key->prog_active) {
/* Emit GS program relocation */
- intel_bo_emit_reloc(bo,
- I915_GEM_DOMAIN_INSTRUCTION, 0,
- gs.thread0.grf_reg_count << 1,
- offsetof(struct brw_gs_unit_state, thread0),
- brw->gs.prog_bo);
+ dri_bo_emit_reloc(bo,
+ I915_GEM_DOMAIN_INSTRUCTION, 0,
+ gs.thread0.grf_reg_count << 1,
+ offsetof(struct brw_gs_unit_state, thread0),
+ brw->gs.prog_bo);
}
return bo;
NULL, NULL);
/* Emit SF program relocation */
- intel_bo_emit_reloc(bo,
- I915_GEM_DOMAIN_INSTRUCTION, 0,
- sf.thread0.grf_reg_count << 1,
- offsetof(struct brw_sf_unit_state, thread0),
- brw->sf.prog_bo);
+ dri_bo_emit_reloc(bo,
+ I915_GEM_DOMAIN_INSTRUCTION, 0,
+ sf.thread0.grf_reg_count << 1,
+ offsetof(struct brw_sf_unit_state, thread0),
+ brw->sf.prog_bo);
/* Emit SF viewport relocation */
- intel_bo_emit_reloc(bo,
- I915_GEM_DOMAIN_INSTRUCTION, 0,
- sf.sf5.front_winding | (sf.sf5.viewport_transform << 1),
- offsetof(struct brw_sf_unit_state, sf5),
- brw->sf.vp_bo);
+ dri_bo_emit_reloc(bo,
+ I915_GEM_DOMAIN_INSTRUCTION, 0,
+ sf.sf5.front_winding | (sf.sf5.viewport_transform << 1),
+ offsetof(struct brw_sf_unit_state, sf5),
+ brw->sf.vp_bo);
return bo;
}
#include "brw_context.h"
#include "brw_state.h"
-#include "dri_bufmgr.h"
#include "intel_batchbuffer.h"
/* This is used to initialize brw->state.atoms[]. We could use this
NULL, NULL);
/* Emit VS program relocation */
- intel_bo_emit_reloc(bo,
- I915_GEM_DOMAIN_INSTRUCTION, 0,
- vs.thread0.grf_reg_count << 1,
- offsetof(struct brw_vs_unit_state, thread0),
- brw->vs.prog_bo);
+ dri_bo_emit_reloc(bo,
+ I915_GEM_DOMAIN_INSTRUCTION, 0,
+ vs.thread0.grf_reg_count << 1,
+ offsetof(struct brw_vs_unit_state, thread0),
+ brw->vs.prog_bo);
return bo;
}
if (!brw->attribs.Texture->Unit[i]._ReallyEnabled)
continue;
- intel_bo_emit_reloc(brw->wm.sampler_bo,
- I915_GEM_DOMAIN_INSTRUCTION, 0,
- 0,
- i * sizeof(struct brw_sampler_state) +
- offsetof(struct brw_sampler_state, ss2),
- brw->wm.sdc_bo[i]);
+ dri_bo_emit_reloc(brw->wm.sampler_bo,
+ I915_GEM_DOMAIN_INSTRUCTION, 0,
+ 0,
+ i * sizeof(struct brw_sampler_state) +
+ offsetof(struct brw_sampler_state, ss2),
+ brw->wm.sdc_bo[i]);
}
}
}
#include "brw_context.h"
#include "brw_state.h"
#include "brw_defines.h"
-#include "dri_bufmgr.h"
#include "brw_wm.h"
/***********************************************************************
NULL, NULL);
/* Emit WM program relocation */
- intel_bo_emit_reloc(bo,
- I915_GEM_DOMAIN_INSTRUCTION, 0,
- wm.thread0.grf_reg_count << 1,
- offsetof(struct brw_wm_unit_state, thread0),
- brw->wm.prog_bo);
+ dri_bo_emit_reloc(bo,
+ I915_GEM_DOMAIN_INSTRUCTION, 0,
+ wm.thread0.grf_reg_count << 1,
+ offsetof(struct brw_wm_unit_state, thread0),
+ brw->wm.prog_bo);
/* Emit scratch space relocation */
if (key->total_scratch != 0) {
- intel_bo_emit_reloc(bo,
- 0, 0,
- wm.thread2.per_thread_scratch_space,
- offsetof(struct brw_wm_unit_state, thread2),
- brw->wm.scratch_buffer);
+ dri_bo_emit_reloc(bo,
+ 0, 0,
+ wm.thread2.per_thread_scratch_space,
+ offsetof(struct brw_wm_unit_state, thread2),
+ brw->wm.scratch_buffer);
}
/* Emit sampler state relocation */
if (key->sampler_count != 0) {
- intel_bo_emit_reloc(bo,
- I915_GEM_DOMAIN_INSTRUCTION, 0,
- wm.wm4.stats_enable | (wm.wm4.sampler_count << 2),
- offsetof(struct brw_wm_unit_state, wm4),
- brw->wm.sampler_bo);
+ dri_bo_emit_reloc(bo,
+ I915_GEM_DOMAIN_INSTRUCTION, 0,
+ wm.wm4.stats_enable | (wm.wm4.sampler_count << 2),
+ offsetof(struct brw_wm_unit_state, wm4),
+ brw->wm.sampler_bo);
}
return bo;
if (key->bo) {
/* Emit relocation to surface contents */
- intel_bo_emit_reloc(bo,
- I915_GEM_DOMAIN_SAMPLER, 0,
- 0,
- offsetof(struct brw_surface_state, ss1),
- key->bo);
+ dri_bo_emit_reloc(bo,
+ I915_GEM_DOMAIN_SAMPLER, 0,
+ 0,
+ offsetof(struct brw_surface_state, ss1),
+ key->bo);
}
return bo;
}
* them both. We might be able to figure out from other state
* a more restrictive relocation to emit.
*/
- intel_bo_emit_reloc(brw->wm.surf_bo[unit],
- I915_GEM_DOMAIN_RENDER |
- I915_GEM_DOMAIN_SAMPLER,
- I915_GEM_DOMAIN_RENDER,
- 0,
- offsetof(struct brw_surface_state, ss1),
- region_bo);
+ dri_bo_emit_reloc(brw->wm.surf_bo[unit],
+ I915_GEM_DOMAIN_RENDER |
+ I915_GEM_DOMAIN_SAMPLER,
+ I915_GEM_DOMAIN_RENDER,
+ 0,
+ offsetof(struct brw_surface_state, ss1),
+ region_bo);
}
}
}
/* Emit binding table relocations to surface state */
for (i = 0; i < BRW_WM_MAX_SURF; i++) {
if (brw->wm.surf_bo[i] != NULL) {
- intel_bo_emit_reloc(bind_bo,
- I915_GEM_DOMAIN_INSTRUCTION, 0,
- 0,
- i * sizeof(GLuint),
- brw->wm.surf_bo[i]);
+ dri_bo_emit_reloc(bind_bo,
+ I915_GEM_DOMAIN_INSTRUCTION, 0,
+ 0,
+ i * sizeof(GLuint),
+ brw->wm.surf_bo[i]);
}
}
UNLOCK_HARDWARE(intel);
if (INTEL_DEBUG & DEBUG_SYNC) {
- int irq;
-
fprintf(stderr, "waiting for idle\n");
- LOCK_HARDWARE(intel);
- irq = intelEmitIrqLocked(intel->intelScreen);
- UNLOCK_HARDWARE(intel);
- intelWaitIrq(intel->intelScreen, irq);
+ dri_bo_map(batch->buf, GL_TRUE);
+ dri_bo_unmap(batch->buf);
}
/* Reset the buffer:
if (batch->ptr - batch->map > batch->buf->size)
_mesa_printf ("bad relocation ptr %p map %p offset %d size %d\n",
batch->ptr, batch->map, batch->ptr - batch->map, batch->buf->size);
- ret = intel_bo_emit_reloc(batch->buf, read_domains, write_domain,
- delta, batch->ptr - batch->map, buffer);
+ ret = dri_bo_emit_reloc(batch->buf, read_domains, write_domain,
+ delta, batch->ptr - batch->map, buffer);
/*
* Using the old buffer offset, write in what the right data would be, in case
#include "mtypes.h"
-#include "dri_bufmgr.h"
+#include "intel_bufmgr.h"
#include "intel_reg.h"
struct intel_context;
#include "intel_context.h"
#include "intel_ioctl.h"
-#include "dri_bufmgr.h"
extern void intelCopyBuffer(const __DRIdrawablePrivate * dpriv,
const drm_clip_rect_t * rect);
#include "intel_buffer_objects.h"
#include "intel_batchbuffer.h"
#include "intel_regions.h"
-#include "dri_bufmgr.h"
static GLboolean intel_bufferobj_unmap(GLcontext * ctx,
GLenum target,
}
if (rb->region) {
- intel_bo_flink(rb->region->buffer, &name);
+ dri_bo_flink(rb->region->buffer, &name);
if (name == buffers[i].name)
continue;
}
GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
- volatile struct drm_i915_sarea *saPriv = (struct drm_i915_sarea *)
- (((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset);
int fthrottle_mode;
if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
driContextPriv->driverPrivate = intel;
intel->intelScreen = intelScreen;
intel->driScreen = sPriv;
- intel->sarea = saPriv;
+ intel->sarea = intelScreen->sarea;
intel->driContext = driContextPriv;
/* Dri stuff */
#include "drm.h"
#include "mm.h"
#include "texmem.h"
-#include "dri_bufmgr.h"
#include "intel_bufmgr.h"
#include "intel_screen.h"
#define FILE_DEBUG_FLAG DEBUG_IOCTL
-int
-intelEmitIrqLocked(intelScreenPrivate *intelScreen)
-{
- __DRIscreenPrivate *spriv = intelScreen->driScrnPriv;
- struct drm_i915_irq_emit ie;
- int ret, seq = 1;
-
- if (intelScreen->no_hw)
- return 1;
-
- /*
- assert(((*(int *)intelScreen->driHwLock) & ~DRM_LOCK_CONT) ==
- (DRM_LOCK_HELD|intelScreen->hHWContext));
- */
-
- ie.irq_seq = &seq;
-
- ret = drmCommandWriteRead(spriv->fd, DRM_I915_IRQ_EMIT, &ie, sizeof(ie));
- if (ret) {
- fprintf(stderr, "%s: drm_i915_irq_emit: %d\n", __FUNCTION__, ret);
- exit(1);
- }
-
- DBG("%s --> %d\n", __FUNCTION__, seq);
-
- return seq;
-}
-
-void
-intelWaitIrq(intelScreenPrivate *intelScreen, int seq)
-{
- __DRIscreenPrivate *spriv = intelScreen->driScrnPriv;
- struct drm_i915_irq_wait iw;
- int ret, lastdispatch;
- volatile struct drm_i915_sarea *sarea = (struct drm_i915_sarea *)
- (((GLubyte *) spriv->pSAREA) + intelScreen->sarea_priv_offset);
-
- if (intelScreen->no_hw)
- return;
-
- DBG("%s %d\n", __FUNCTION__, seq);
-
- iw.irq_seq = seq;
-
- do {
- lastdispatch = sarea->last_dispatch;
- ret = drmCommandWrite(spriv->fd, DRM_I915_IRQ_WAIT, &iw, sizeof(iw));
- } while (ret == -EAGAIN ||
- ret == -EINTR ||
- (ret == -EBUSY && lastdispatch != sarea->last_dispatch) ||
- (ret == 0 && seq > sarea->last_dispatch) ||
- (ret == 0 && sarea->last_dispatch - seq >= (1 << 24)));
-
- if (ret) {
- fprintf(stderr, "%s: drm_i915_irq_wait: %d\n", __FUNCTION__, ret);
- exit(1);
- }
-}
-
-
int
intel_batch_ioctl(struct intel_context *intel,
GLuint start_offset,
#include "intel_context.h"
-void intelWaitIrq(intelScreenPrivate *intelScreen, int seq);
-int intelEmitIrqLocked(intelScreenPrivate *intelScreen);
-
int intel_batch_ioctl(struct intel_context *intel,
GLuint start_offset,
GLuint used,
#include "intel_regions.h"
#include "intel_blit.h"
#include "intel_buffer_objects.h"
-#include "dri_bufmgr.h"
#include "intel_bufmgr.h"
#include "intel_batchbuffer.h"
#include "intel_chipset.h"
* the basic structure for rectangular collections of pixels stored in a dri_bo.
*/
+#include <xf86drm.h>
+
#include "mtypes.h"
-#include "dri_bufmgr.h"
+#include "intel_bufmgr.h"
struct intel_context;
struct intel_buffer_object;
intelScreen->driScrnPriv = sPriv;
sPriv->private = (void *) intelScreen;
- intelScreen->sarea_priv_offset = gDRIPriv->sarea_priv_offset;
sarea = (struct drm_i915_sarea *)
- (((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset);
+ (((GLubyte *) sPriv->pSAREA) + gDRIPriv->sarea_priv_offset);
+ intelScreen->sarea = sarea;
intelScreen->deviceID = gDRIPriv->deviceID;
return GL_FALSE;
}
- intelScreen->sarea_priv_offset = gDRIPriv->sarea_priv_offset;
-
if (0)
intelPrintDRIInfo(intelScreen, sPriv, gDRIPriv);
return configs;
}
-
-/** Driver-specific fence emit implementation for the fake memory manager. */
-static unsigned int
-intel_fence_emit(void *private)
-{
- intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
- unsigned int fence;
-
- /* XXX: Need to emit a flush, if we haven't already (at least with the
- * current batchbuffer implementation, we have).
- */
-
- fence = intelEmitIrqLocked(intelScreen);
-
- return fence;
-}
-
-/** Driver-specific fence wait implementation for the fake memory manager. */
-static int
-intel_fence_wait(void *private, unsigned int cookie)
-{
- intelScreenPrivate *intelScreen = (intelScreenPrivate *)private;
-
- intelWaitIrq(intelScreen, cookie);
-
- return 0;
-}
-
static GLboolean
intel_init_bufmgr(intelScreenPrivate *intelScreen)
{
return GL_FALSE;
}
- intelScreen->bufmgr = intel_bufmgr_fake_init(intelScreen->tex.offset,
- intelScreen->tex.map,
- intelScreen->tex.size,
- intel_fence_emit,
- intel_fence_wait,
- intelScreen);
+ intelScreen->bufmgr =
+ intel_bufmgr_fake_init(spriv->fd,
+ intelScreen->tex.offset,
+ intelScreen->tex.map,
+ intelScreen->tex.size,
+ (unsigned int * volatile)
+ &intelScreen->sarea->last_dispatch);
}
/* XXX bufmgr should be per-screen, not per-context */
#include <sys/time.h>
#include "dri_util.h"
-#include "dri_bufmgr.h"
+#include "intel_bufmgr.h"
#include "i915_drm.h"
#include "xmlconfig.h"
int logTextureGranularity;
__DRIscreenPrivate *driScrnPriv;
- unsigned int sarea_priv_offset;
+
+ volatile struct drm_i915_sarea *sarea;
int drmMinor;
projects / mesa.git / commitdiff