[ARM] Tweak HONOR_REG_ALLOC_ORDER

Setting HONOR_REG_ALLOC_ORDER improves codesize with -Os, however it generates
slower and larger code with -O2 and higher.  So only set it when optimizing for
size.  On Cortex-A57 this improves SPECINT2006 by 0.15% and SPECFP2006 by 0.25%
while reducing codesize.

    gcc/
	* config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Set when optimizing for
	size.

From-SVN: r276887

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1a86675904399c4540b493cf50eabd091d13d8b1..8118e14b5633b57d4bd26c47640bc053c7eff366 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-10-11  Wilco Dijkstra  <wdijkstr@arm.com>
+
+       * config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Set when optimizing for
+       size.
+
 2019-10-11  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 
        * tree-vect-loop.c (vect_analyze_loop_operations): Adjust call to

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 8b67c9c3657b312be223ab60c01969958baa9ed3..5fad1e5bcc2bc448489fdc8239c676246bbc8879 100644 (file)
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1068,9 +1068,8 @@ extern int arm_regs_in_sequence[];
 /* Use different register alloc ordering for Thumb.  */
 #define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc ()
 
-/* Tell IRA to use the order we define rather than messing it up with its
-   own cost calculations.  */
-#define HONOR_REG_ALLOC_ORDER 1
+/* Tell IRA to use the order we define when optimizing for size.  */
+#define HONOR_REG_ALLOC_ORDER optimize_function_for_size_p (cfun)
 
 /* Interrupt functions can only use registers that have already been
    saved by the prologue, even if they would normally be