CHIP_LAST,
};
+enum chip_class {
+ R600,
+ R700,
+ EVERGREEN,
+};
+
enum radeon_family r600_get_family(struct radeon *rw);
+enum chip_class r600_get_family_class(struct radeon *radeon);
/* lowlevel WS bo */
struct radeon_ws_bo;
radeon_ws_bo_reference(rscreen->rw, &bo, NULL);
return;
}
- switch (rscreen->chip_class) {
+ switch (radeon_get_family_class(rscreen->rw)) {
case R600:
memcpy(data, shader_bc_r600, 128);
break;
radeon_ws_bo_reference(rscreen->rw, &bo, NULL);
return;
}
- switch (rscreen->chip_class) {
+ switch (radeon_get_family_class(rscreen->rw)) {
case R600:
memcpy(data, shader_bc_r600, 48);
break;
rctx->screen = rscreen;
rctx->rw = rscreen->rw;
- if (rscreen->chip_class == EVERGREEN)
+ if (radeon_get_family_class(rscreen->rw) == EVERGREEN)
rctx->vtbl = &eg_hw_state_vtbl;
else
rctx->vtbl = &r600_hw_state_vtbl;
if (query_running) {
db_render_override |= S_028D10_NOOP_CULL_DISABLE(1);
- if (rscreen->chip_class == R700)
+ if (radeon_get_family_class(rscreen->rw) == R700)
db_render_control |= S_028D0C_R700_PERFECT_ZPASS_COUNTS(1);
}
rstate->states[R600_CB_CNTL__CB_SHADER_MASK] = shader_mask;
rstate->states[R600_CB_CNTL__CB_TARGET_MASK] = target_mask;
rstate->states[R600_CB_CNTL__CB_COLOR_CONTROL] = color_control;
- if (rscreen->chip_class == R700)
+ if (radeon_get_family_class(rscreen->rw) == R700)
rstate->states[R600_CB_CNTL__CB_SHADER_CONTROL] = shader_control;
rstate->states[R600_CB_CNTL__PA_SC_AA_CONFIG] = 0x00000000;
rstate->states[R600_CB_CNTL__PA_SC_AA_SAMPLE_LOCS_MCTX] = 0x00000000;
if (rscreen == NULL) {
return NULL;
}
-
+
/* don't enable mem constant for r600 yet */
rscreen->use_mem_constant = FALSE;
-
- switch (family) {
- case CHIP_R600:
- case CHIP_RV610:
- case CHIP_RV630:
- case CHIP_RV670:
- case CHIP_RV620:
- case CHIP_RV635:
- case CHIP_RS780:
- case CHIP_RS880:
- rscreen->chip_class = R600;
- break;
- case CHIP_RV770:
- case CHIP_RV730:
- case CHIP_RV710:
- case CHIP_RV740:
- rscreen->chip_class = R700;
- break;
- case CHIP_CEDAR:
- case CHIP_REDWOOD:
- case CHIP_JUNIPER:
- case CHIP_CYPRESS:
- case CHIP_HEMLOCK:
- rscreen->chip_class = EVERGREEN;
+ if (radeon_get_family_class(rw) == EVERGREEN) {
rscreen->use_mem_constant = TRUE;
- break;
- default:
- FREE(rscreen);
- return NULL;
}
+
radeon_set_mem_constant(rw, rscreen->use_mem_constant);
rscreen->rw = rw;
rscreen->screen.winsys = (struct pipe_winsys*)rw;
struct pipe_resource *linear_texture;
};
-enum chip_class {
- R600,
- R700,
- EVERGREEN,
-};
-
struct r600_screen {
struct pipe_screen screen;
struct radeon *rw;
- enum chip_class chip_class;
- boolean use_mem_constant;
+ boolean use_mem_constant;
};
static INLINE struct r600_screen *r600_screen(struct pipe_screen *screen)
rctx->context.set_blend_color = r600_set_blend_color;
rctx->context.set_clip_state = r600_set_clip_state;
- if (rctx->screen->chip_class == EVERGREEN)
+ if (radeon_get_family_class(rctx->rw) == EVERGREEN)
rctx->context.set_constant_buffer = eg_set_constant_buffer;
else if (rctx->screen->use_mem_constant)
rctx->context.set_constant_buffer = r600_set_constant_buffer_mem;
#include "r600_state_inlines.h"
-enum chip_class {
- R600,
- R700,
- EVERGREEN,
-};
-
enum r600_pipe_state_id {
R600_PIPE_STATE_BLEND = 0,
R600_PIPE_STATE_BLEND_COLOR,
struct r600_screen {
struct pipe_screen screen;
struct radeon *radeon;
- unsigned chip_class;
};
struct r600_pipe_sampler_view {
return NULL;
}
- switch (family) {
- case CHIP_R600:
- case CHIP_RV610:
- case CHIP_RV630:
- case CHIP_RV670:
- case CHIP_RV620:
- case CHIP_RV635:
- case CHIP_RS780:
- case CHIP_RS880:
- rscreen->chip_class = R600;
- break;
- case CHIP_RV770:
- case CHIP_RV730:
- case CHIP_RV710:
- case CHIP_RV740:
- rscreen->chip_class = R700;
- break;
- default:
- FREE(rscreen);
- return NULL;
- }
rscreen->radeon = radeon;
rscreen->screen.winsys = (struct pipe_winsys*)radeon;
rscreen->screen.destroy = r600_destroy_screen;
struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
const struct pipe_resource *templ)
{
- struct r600_screen *rscreen = r600_screen(screen);
struct r600_resource_texture *rtex;
struct r600_resource *resource;
struct radeon *radeon = (struct radeon *)screen->winsys;
resource->base.vtbl = &r600_texture_vtbl;
pipe_reference_init(&resource->base.b.reference, 1);
resource->base.b.screen = screen;
- r600_setup_miptree(rtex, rscreen->chip_class);
+ r600_setup_miptree(rtex, radeon_get_family_class(radeon));
/* FIXME alignment 4096 enought ? too much ? */
resource->domain = r600_domain_from_usage(resource->base.b.bind);
void* r600_texture_transfer_map(struct pipe_context *ctx,
struct pipe_transfer* transfer)
{
- struct r600_screen *rscreen = r600_screen(ctx->screen);
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
struct radeon_ws_bo *bo;
enum pipe_format format = transfer->resource->format;
bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
} else {
rtex = (struct r600_resource_texture*)transfer->resource;
- if (rtex->depth && rscreen->chip_class != EVERGREEN) {
+ if (rtex->depth && radeon_get_family_class(radeon) != EVERGREEN) {
r = r600_texture_from_depth(ctx, rtex, transfer->sr.level);
if (r) {
return NULL;
CHIP_LAST,
};
+enum chip_class {
+ R600,
+ R700,
+ EVERGREEN,
+};
+
enum {
R600_SHADER_PS = 1,
R600_SHADER_VS,
};
enum radeon_family radeon_get_family(struct radeon *rw);
+enum chip_class radeon_get_family_class(struct radeon *radeon);
void radeon_set_mem_constant(struct radeon *radeon, boolean state);
/* lowlevel WS bo */
return r600->family;
}
+enum chip_class r600_get_family_class(struct radeon *radeon)
+{
+ return radeon->chip_class;
+}
+
static int r600_get_device(struct radeon *r600)
{
struct drm_radeon_info info;
R600_ERR("unknown or unsupported chipset 0x%04X\n", r600->device);
break;
}
+
+ /* setup class */
+ switch (r600->family) {
+ case CHIP_R600:
+ case CHIP_RV610:
+ case CHIP_RV630:
+ case CHIP_RV670:
+ case CHIP_RV620:
+ case CHIP_RV635:
+ case CHIP_RS780:
+ case CHIP_RS880:
+ r600->chip_class = R600;
+ break;
+ case CHIP_RV770:
+ case CHIP_RV730:
+ case CHIP_RV710:
+ case CHIP_RV740:
+ r600->chip_class = R700;
+ break;
+ case CHIP_CEDAR:
+ case CHIP_REDWOOD:
+ case CHIP_JUNIPER:
+ case CHIP_CYPRESS:
+ case CHIP_HEMLOCK:
+ r600->chip_class = EVERGREEN;
+ break;
+ default:
+ R600_ERR("unknown or unsupported chipset 0x%04X\n", r600->device);
+ break;
+ }
+
return r600;
}
int refcount;
unsigned device;
unsigned family;
+ enum chip_class chip_class;
};
struct radeon *r600_new(int fd, unsigned device);
return radeon->family;
}
+enum chip_class radeon_get_family_class(struct radeon *radeon)
+{
+ return radeon->chip_class;
+}
+
void radeon_set_mem_constant(struct radeon *radeon, boolean state)
{
radeon->use_mem_constant = state;
break;
}
+ /* setup class */
+ switch (radeon->family) {
+ case CHIP_R600:
+ case CHIP_RV610:
+ case CHIP_RV630:
+ case CHIP_RV670:
+ case CHIP_RV620:
+ case CHIP_RV635:
+ case CHIP_RS780:
+ case CHIP_RS880:
+ radeon->chip_class = R600;
+ break;
+ case CHIP_RV770:
+ case CHIP_RV730:
+ case CHIP_RV710:
+ case CHIP_RV740:
+ radeon->chip_class = R700;
+ break;
+ case CHIP_CEDAR:
+ case CHIP_REDWOOD:
+ case CHIP_JUNIPER:
+ case CHIP_CYPRESS:
+ case CHIP_HEMLOCK:
+ radeon->chip_class = EVERGREEN;
+ break;
+ default:
+ fprintf(stderr, "%s unknown or unsupported chipset 0x%04X\n",
+ __func__, radeon->device);
+ break;
+ }
+
radeon->mman = pb_malloc_bufmgr_create();
if (!radeon->mman)
return NULL;
int refcount;
unsigned device;
unsigned family;
+ enum chip_class chip_class;
unsigned nstype;
struct radeon_stype_info *stype;
unsigned max_states;