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author
Eddie Hung
<eddieh@ece.ubc.ca>
Fri, 8 Feb 2019 16:37:44 +0000
(08:37 -0800)
committer
Eddie Hung
<eddieh@ece.ubc.ca>
Fri, 8 Feb 2019 16:37:44 +0000
(08:37 -0800)
frontends/aiger/aigerparse.cc
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diff --git
a/frontends/aiger/aigerparse.cc
b/frontends/aiger/aigerparse.cc
index c3cc6b32121ee9fe0aca8ab0c9ef2a9737f2107b..56e4f3b2cf2ea0ffff318ef99c51326ec668d77f 100644
(file)
--- a/
frontends/aiger/aigerparse.cc
+++ b/
frontends/aiger/aigerparse.cc
@@
-135,6
+135,7
@@
static void parse_aiger_ascii(RTLIL::Design *design, std::istream &f, std::strin
module->addDff(NEW_ID, clk_wire, d_wire, q_wire);
+ // Reset logic is optional in AIGER 1.9
if (f.peek() == ' ') {
if (!(f >> l3))
log_error("Line %d cannot be interpreted as a latch!\n", line_count);