---------- Begin Simulation Statistics ----------
-host_inst_rate 104057 # Simulator instruction rate (inst/s)
-host_mem_usage 179368 # Number of bytes of host memory used
-host_seconds 0.10 # Real time elapsed on the host
-host_tick_rate 103746 # Simulator tick rate (ticks/s)
+host_inst_rate 65718 # Simulator instruction rate (inst/s)
+host_mem_usage 179556 # Number of bytes of host memory used
+host_seconds 0.17 # Real time elapsed on the host
+host_tick_rate 65601 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
-sim_insts 10367 # Number of instructions simulated
+sim_insts 11001 # Number of instructions simulated
sim_seconds 0.000000 # Number of seconds simulated
-sim_ticks 10366 # Number of ticks simulated
+sim_ticks 11000 # Number of ticks simulated
system.cpu.idle_fraction 0 # Percentage of idle cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu.numCycles 10367 # number of cpu cycles simulated
-system.cpu.num_insts 10367 # Number of instructions executed
-system.cpu.num_refs 2607 # Number of memory references
+system.cpu.numCycles 11001 # number of cpu cycles simulated
+system.cpu.num_insts 11001 # Number of instructions executed
+system.cpu.num_refs 2760 # Number of memory references
system.cpu.workload.PROG:num_syscalls 8 # Number of system calls
---------- End Simulation Statistics ----------
CASX WORK: Passed
LDTX: Passed
LDTW: Passed
+STTW: Passed
Done
M5 Simulator System
All Rights Reserved
-M5 compiled Mar 6 2007 15:43:35
-M5 started Tue Mar 6 15:52:39 2007
+M5 compiled Mar 29 2007 15:29:35
+M5 started Thu Mar 29 15:39:35 2007
M5 executing on zeep
command line: build/SPARC_SE/m5.debug -d build/SPARC_SE/tests/debug/quick/02.insttest/sparc/linux/simple-atomic tests/run.py quick/02.insttest/sparc/linux/simple-atomic
-Exiting @ tick 10366 because target called exit()
+Global frequency set at 1000000000000 ticks per second
+Exiting @ tick 11000 because target called exit()