+2008-05-18 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_secondary_reload): New static function.
+ (TARGET_SECONDARY_RELOAD): New define.
+ * config/i386/i386.h (SECONDARY_OUTPUT_RELOAD_CLASS): Remove.
+ * config/i386/i386.md (reload_outqi): Remove.
+
2008-05-18 Xinliang David Li <davidxl@google.com>
* gcc/tree-ssa-dce.c: Coding style fix.
2008-05-17 Kaz Kojima <kkojima@gcc.gnu.org>
- * config/sh/sh.c (sh_output_mi_thunk): Update the use of
- init_flow.
+ * config/sh/sh.c (sh_output_mi_thunk): Update the use of init_flow.
2008-05-17 Eric Botcazou <ebotcazou@adacore.com>
2008-05-16 David S. Miller <davem@davemloft.net>
- * config/sparc/linux.h (NO_PROFILE_COUNTERS): Undef before
- overriding.
+ * config/sparc/linux.h (NO_PROFILE_COUNTERS): Undef before overriding.
* config/sparc/linux64.h (NO_PROFILE_COUNTERS): Likewise.
2008-05-16 Uros Bizjak <ubizjak@gmail.com>
* ifcvt.c (dead_or_predicable): Rename
df_simulate_one_insn_backwards to df_simulate_one_insn.
* recog.c (peephole2_optimize): Ditto.
- * rtl-factoring.c (collect_pattern_seqs, clear_regs_live_in_seq):
- Ditto.
+ * rtl-factoring.c (collect_pattern_seqs, clear_regs_live_in_seq): Ditto.
* df.h: Rename df_simulate_one_insn_backwards to
df_simulate_one_insn. and delete df_simulate_one_insn_forwards.
* df-problems.c (df_simulate_artificial_refs_at_top) Reversed
* tree-ssa-sccvn.c (compare_ops, init_scc_vn): Ditto.
* function.h (cfun.last_stmt_uid): New field.
* tree-flow-inline.h (set_gimple_stmt_uid, gimple_stmt_uid,
- gimple_stmt_max_uid, set_gimple_stmt_max_uid,
- inc_gimple_stmt_max_uid): New functions.
+ gimple_stmt_max_uid, set_gimple_stmt_max_uid, inc_gimple_stmt_max_uid):
+ New functions.
* tree-dfa.c (renumber_gimple_stmt_uids): New function.
(create_stmt_ann): Initialize the ann->uid field.
* tree-ssa-pre.c (compute_avail): Encapsulate the stmt_ann->uid
MULTILIB_MATCHES, MULTILIB_EXCEPTIONS): Likewise.
* config/bfin/t-bfin-linux (MULTILIB_OPTIONS, MULTILIB_DIRNAMES,
MULTILIB_MATCHES, MULTILIB_EXCEPTIONS): Likewise.
- * config/bfin/bfin-protos.h (enum bfin_cpu_type): Add
- BFIN_CPU_UNKNOWN.
+ * config/bfin/bfin-protos.h (enum bfin_cpu_type): Add BFIN_CPU_UNKNOWN.
* config/bfin/elf.h (STARTFILE_SPEC): Use specific CRT for BF561.
(LIB_SPEC): Use proper linker script for bf561. Error if no mcpu
option.
* cgraph.h (compute_inline_parameters): Made public.
* tree-pass.h (ipa_opt_pass): Removed function_generate_summary,
variable_generate_summary, function_write_summary,
- variable_write_summary, variable_read_summary. Added
- generate_summary, write_summary, read_summary.
+ variable_write_summary, variable_read_summary. Added generate_summary,
+ write_summary, read_summary.
* cgraphunit.c (cgraph_process_new_functions): Changed call from
pass_ipa_inline.function_generate_summary, to
compute_inline_parameters.
return regclass;
}
+static enum reg_class
+ix86_secondary_reload (bool in_p, rtx x, enum reg_class class,
+ enum machine_mode mode,
+ secondary_reload_info *sri ATTRIBUTE_UNUSED)
+{
+ /* QImode spills from non-QI registers require
+ intermediate register on 32bit targets. */
+ if (!in_p && mode == QImode && class == NON_Q_REGS
+ && !TARGET_64BIT)
+ {
+ int regno;
+
+ if (REG_P (x))
+ regno = REGNO (x);
+ else
+ regno = -1;
+
+ if (regno >= FIRST_PSEUDO_REGISTER || GET_CODE (x) == SUBREG)
+ regno = true_regnum (x);
+
+ /* Return Q_REGS if the operand is in memory. */
+ if (regno == -1)
+ return Q_REGS;
+ }
+
+ return NO_REGS;
+}
+
/* If we are copying between general and FP registers, we need a memory
location. The same is true for SSE and MMX registers.
#undef TARGET_FUNCTION_VALUE
#define TARGET_FUNCTION_VALUE ix86_function_value
+#undef TARGET_SECONDARY_RELOAD
+#define TARGET_SECONDARY_RELOAD ix86_secondary_reload
+
#undef TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST
#define TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST x86_builtin_vectorization_cost
? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
: MODE)
-/* QImode spills from non-QI registers need a scratch. This does not
- happen often -- the only example so far requires an uninitialized
- pseudo. */
-
-#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
- (((CLASS) == GENERAL_REGS || (CLASS) == LEGACY_REGS \
- || (CLASS) == INDEX_REGS) && !TARGET_64BIT && (MODE) == QImode \
- ? Q_REGS : NO_REGS)
-
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS. */
/* On the 80386, this is the size of MODE in words,
]
(const_string "QI")))])
-(define_expand "reload_outqi"
- [(parallel [(match_operand:QI 0 "" "=m")
- (match_operand:QI 1 "register_operand" "r")
- (match_operand:QI 2 "register_operand" "=&q")])]
- ""
-{
- rtx op0, op1, op2;
- op0 = operands[0]; op1 = operands[1]; op2 = operands[2];
-
- gcc_assert (!reg_overlap_mentioned_p (op2, op0));
- if (! q_regs_operand (op1, QImode))
- {
- emit_insn (gen_movqi (op2, op1));
- op1 = op2;
- }
- emit_insn (gen_movqi (op0, op1));
- DONE;
-})
-
(define_insn "*swapqi_1"
[(set (match_operand:QI 0 "register_operand" "+r")
(match_operand:QI 1 "register_operand" "+r"))
projects / gcc.git / commitdiff