r600g: Initialize multi VGT related register on Cayman.
authorMichel Dänzer <michel.daenzer@amd.com>
Wed, 14 Sep 2011 16:37:48 +0000 (18:37 +0200)
committerMichel Dänzer <michel@daenzer.net>
Wed, 14 Sep 2011 16:40:16 +0000 (18:40 +0200)
Prevents lockups with piglit tests draw-elements and draw-vertices using large
numbers of vertices.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alex.deucher@amd.com>
src/gallium/drivers/r600/evergreen_state.c
src/gallium/drivers/r600/evergreend.h
src/gallium/winsys/r600/drm/evergreen_hw_context.c

index 2c7b20ae78a94b2bf1eb4cd7ca6b18c2bf54515e..b07251a65c73d32cdabc2b63aa3988911e83b668 100644 (file)
@@ -1647,6 +1647,7 @@ static void cayman_init_config(struct r600_pipe_context *rctx)
        r600_pipe_state_add_reg(rstate, R_028A40_VGT_GS_MODE, 0x0, 0xFFFFFFFF, NULL, 0);
        r600_pipe_state_add_reg(rstate, R_028B94_VGT_STRMOUT_CONFIG, 0x0, 0xFFFFFFFF, NULL, 0);
        r600_pipe_state_add_reg(rstate, R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 0x0, 0xFFFFFFFF, NULL, 0);
+       r600_pipe_state_add_reg(rstate, R_028AA8_IA_MULTI_VGT_PARAM, S_028AA8_SWITCH_ON_EOP(1) | S_028AA8_PARTIAL_VS_WAVE_ON(1) | S_028AA8_PRIMGROUP_SIZE(63), 0xFFFFFFFF, NULL, 0);
        r600_pipe_state_add_reg(rstate, R_028AB4_VGT_REUSE_OFF, 0x00000000, 0xFFFFFFFF, NULL, 0);
        r600_pipe_state_add_reg(rstate, R_028AB8_VGT_VTX_CNT_EN, 0x0, 0xFFFFFFFF, NULL, 0);
        r600_pipe_state_add_reg(rstate, R_008A14_PA_CL_ENHANCE, (3 << 1) | 1, 0xFFFFFFFF, NULL, 0);
index 9a8c353e4ee2fce3d60d183464b8d913dcef43e2..cd99e4939d96f0099d384b8e5a50732ca609b25d 100644 (file)
 #define   S_028A40_CUT_MODE(x)                         (((x) & 0x3) << 3)
 #define   G_028A40_CUT_MODE(x)                         (((x) >> 3) & 0x3)
 #define   C_028A40_CUT_MODE                            0xFFFFFFE7
+#define R_028AA8_IA_MULTI_VGT_PARAM                  0x028AA8
+#define   S_028AA8_PRIMGROUP_SIZE(x)                   (((x) & 0xFFFF) << 0)
+#define   G_028AA8_PRIMGROUP_SIZE(x)                   (((x) >> 0) & 0xFFFF)
+#define   C_028AA8_PRIMGROUP_SIZE                      0xFFFF0000
+#define   S_028AA8_PARTIAL_VS_WAVE_ON(x)               (((x) & 0x1) << 16)
+#define   G_028AA8_PARTIAL_VS_WAVE_ON(x)               (((x) >> 16) & 0x1)
+#define   C_028AA8_PARTIAL_VS_WAVE_ON                  0xFFFEFFFF
+#define   S_028AA8_SWITCH_ON_EOP(x)                    (((x) & 0x1) << 17)
+#define   G_028AA8_SWITCH_ON_EOP(x)                    (((x) >> 17) & 0x1)
+#define   C_028AA8_SWITCH_ON_EOP                       0xFFFDFFFF
 #define R_008040_WAIT_UNTIL                          0x008040
 #define   S_008040_WAIT_CP_DMA_IDLE(x)                 (((x) & 0x1) << 8)
 #define   G_008040_WAIT_CP_DMA_IDLE(x)                 (((x) >> 8) & 0x1)
index b35812686bebfd23baf3cb44fea3e0ce03db5db9..3095e2a87f6d7dc5f4286e73a8a72e42bffadbe9 100644 (file)
@@ -675,6 +675,7 @@ static const struct r600_reg cayman_context_reg_list[] = {
        {R_028A40_VGT_GS_MODE, 0, 0, 0},
        {R_028A48_PA_SC_MODE_CNTL_0, 0, 0, 0},
        {R_028A4C_PA_SC_MODE_CNTL_1, 0, 0, 0},
+       {R_028AA8_IA_MULTI_VGT_PARAM, 0, 0, 0},
        {R_028AB4_VGT_REUSE_OFF, 0, 0, 0},
        {R_028AB8_VGT_VTX_CNT_EN, 0, 0, 0},
        {R_028ABC_DB_HTILE_SURFACE, 0, 0, 0},