[(cc0) (const_int 0)])
(label_ref (match_operand 2 "" ""))
(pc)))]
- "peep2_reg_dead_p (2, operands[0])"
+ "((const_int_qi_operand (operands[1], QImode)
+ || const_int_hi_operand (operands[1], HImode))
+ && peep2_reg_dead_p (2, operands[0]))"
[(set (match_dup 4)
(and:QI (match_dup 4)
(match_dup 5)))
(label_ref (match_dup 2))
(pc)))]
{
- operands[4] = gen_rtx_REG (QImode, REGNO (operands[0]));
- operands[5] = gen_int_mode (INTVAL (operands[1]), QImode);
- })
+ enum machine_mode mode;
-(define_peephole2
- [(set (match_operand:SI 0 "register_operand" "")
- (and:SI (match_dup 0)
- (match_operand:SI 1 "const_int_hi_operand" "")))
- (set (cc0) (compare (match_dup 0)
- (const_int 0)))
- (set (pc)
- (if_then_else (match_operator 3 "eqne_operator"
- [(cc0) (const_int 0)])
- (label_ref (match_operand 2 "" ""))
- (pc)))]
- "peep2_reg_dead_p (2, operands[0])"
- [(set (match_dup 4)
- (and:HI (match_dup 4)
- (match_dup 5)))
- (set (cc0) (compare (match_dup 4)
- (const_int 0)))
- (set (pc)
- (if_then_else (match_op_dup 3 [(cc0) (const_int 0)])
- (label_ref (match_dup 2))
- (pc)))]
- {
- operands[4] = gen_rtx_REG (HImode, REGNO (operands[0]));
- operands[5] = gen_int_mode (INTVAL (operands[1]), HImode);
- })
-
-(define_peephole2
- [(set (match_operand:SI 0 "register_operand" "")
- (and:SI (match_dup 0)
- (match_operand:SI 1 "const_int_qi_operand" "")))
- (set (match_dup 0)
- (xor:SI (match_dup 0)
- (match_operand:SI 2 "const_int_qi_operand" "")))
- (set (cc0) (compare (match_dup 0)
- (const_int 0)))
- (set (pc)
- (if_then_else (match_operator 4 "eqne_operator"
- [(cc0) (const_int 0)])
- (label_ref (match_operand 3 "" ""))
- (pc)))]
- "peep2_reg_dead_p (3, operands[0])
- && (~INTVAL (operands[1]) & INTVAL (operands[2])) == 0"
- [(set (match_dup 5)
- (and:QI (match_dup 5)
- (match_dup 6)))
- (set (match_dup 5)
- (xor:QI (match_dup 5)
- (match_dup 7)))
- (set (cc0) (compare (match_dup 5)
- (const_int 0)))
- (set (pc)
- (if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
- (label_ref (match_dup 3))
- (pc)))]
- {
- operands[5] = gen_rtx_REG (QImode, REGNO (operands[0]));
- operands[6] = gen_int_mode (INTVAL (operands[1]), QImode);
- operands[7] = gen_int_mode (INTVAL (operands[2]), QImode);
+ mode = const_int_qi_operand (operands[1], QImode) ? QImode : HImode;
+ operands[4] = gen_rtx_REG (mode, REGNO (operands[0]));
+ operands[5] = gen_int_mode (INTVAL (operands[1]), mode);
})
;; These triggers right at the end of allocation of locals in the