It's not clear yet what the distinction is.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
case TAG_ALU_8:
case TAG_ALU_12:
case TAG_ALU_16:
+ case TAG_ALU_4 + 4:
+ case TAG_ALU_8 + 4:
+ case TAG_ALU_12 + 4:
+ case TAG_ALU_16 + 4:
emit_alu_bundle(ctx, bundle, emission, lookahead);
break;
#define MIDGARD_BROKEN_LOD (1 << 3)
+/* Don't use upper ALU tags for writeout (if you do, you'll get a
+ * INSTR_INVALID_ENC). It's not clear to me what these tags are for. */
+
+#define MIDGARD_NO_UPPER_ALU (1 << 4)
+
static inline unsigned
midgard_get_quirks(unsigned gpu_id)
{
case 0x600:
case 0x620:
return MIDGARD_OLD_BLEND |
- MIDGARD_BROKEN_LOD;
+ MIDGARD_BROKEN_LOD |
+ MIDGARD_NO_UPPER_ALU;
case 0x720:
return MIDGARD_INTERPIPE_REG_ALIASING |
MIDGARD_OLD_BLEND |
- MIDGARD_BROKEN_LOD;
+ MIDGARD_BROKEN_LOD |
+ MIDGARD_NO_UPPER_ALU;
case 0x820:
case 0x830:
return MIDGARD_INTERPIPE_REG_ALIASING;
case 0x750:
+ return MIDGARD_EXPLICIT_LOD |
+ MIDGARD_NO_UPPER_ALU;
+
case 0x860:
case 0x880:
return MIDGARD_EXPLICIT_LOD;
#include "compiler.h"
#include "midgard_ops.h"
+#include "midgard_quirks.h"
#include "util/u_memory.h"
/* Scheduling for Midgard is complicated, to say the least. ALU instructions
/* Size ALU instruction for tag */
bundle.tag = (TAG_ALU_4) + (bytes_emitted / 16) - 1;
+
+ /* MRT capable GPUs use a special writeout procedure */
+ if (writeout && !(ctx->quirks & MIDGARD_NO_UPPER_ALU))
+ bundle.tag += 4;
+
bundle.padding = padding;
bundle.control |= bundle.tag;